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全环绕栅极场效应晶体管的I-V模型紧凑建模
王诗淳, 冯俊杰, 张保钦, 韩玉杰, 徐传忠, 曾霞, 于飞
集成电路与嵌入式系统 ›› 2024, Vol. 24 ›› Issue (10) : 9-18.
PDF(8690 KB)
PDF(8690 KB)
全环绕栅极场效应晶体管的I-V模型紧凑建模
Compact modeling of I-V model for gate-all-around field effect transistors
基于表面电势提出了一种无结型全环绕栅极场效应晶体管的I-V模型。以一维泊松方程为基础,结合相应的边界条件,采用四阶龙格库塔算法对两个解析模型中基于物理原理的非线性超越方程组依次求解,建立了表面电势、中点电势与栅极电压相关的数值模型。随后,根据数值模型中以中间参数形式表示的表面电势结果,利用Pao-Sah积分推导出全环绕栅极场效应晶体管的漏极电流。所提出的I-V模型结果与数值和实验数据均显示出良好的一致性,验证了该建模方法用于全环绕栅极场效应晶体管的可行性。此外,该方法实现了解析模型与数值模型的结合,在精度和效率之间实现了很好的平衡。
A surface-potential-based I-V model for junctionless gate-all-around transistors is presented in this paper. Based on the one-dimensional poisson equation, combined with the corresponding boundary conditions, the nonlinear system of transcendental equations based on physical principles in two analytical models is sequentially solved using the Runge-Kutta algorithm, establishing the numerical models of the surface potential, midpoint potential, and gate pressure. Subsequently, Pao-Sah integration is used to derive the drain current of gate-all-around field effect transistors through the results of the surface potential expressed in form of the intermediate parameter. The proposed physics-based I-V model results exhibit good agreements with numerical and experimental data, validating the feasibility of the modeling approach for gate-all-around field effect transistors. Moreover, this method realizes the combination of analytical and numerical models and achieves a good balance between accuracy and efficiency.
无结型全环绕栅极场效应晶体管 / I-V模型 / 表面电势 / Pao-Sah模型
junctionless gate-all-around transistors / I-V model / surface potential / Pao-Sah model
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