With the continuous iteration and development of computer vision technology, intelligent applications and devices centered on computer vision are increasingly playing a crucial role in daily life and work. Among these, visual Simultaneous Localization and Mapping (SLAM) technology finds extensive applications in fields such as robotics, drones, and autonomous driving. These fields critically rely on visual SLAM to provide accurate localization information for precise mapping and autonomous navigation. However, due to the inherent characteristics of visual SLAM algorithms, which involve high computational complexity and significant data dependency, traditional hardware platforms (CPU or GPU) struggle to meet the real-time and low-power requirements of edge applications. This limitation has become a key obstacle to the widespread adoption of visual SLAM. To address this issue, this paper proposes a high-efficiency domain-specific accelerator for ORB feature extraction in SLAM, designed through a co-optimization strategy of algorithms and hardware. Various hardware design techniques are employed to enhance computational performance and energy efficiency, include multi-level parallel computing based on decoupling data dependencies, data storage technology based on multi-size buckets, and pixel-level symmetric lightweight descriptor generation and direction calculation strategies. The proposed visual SLAM accelerator was tested and verified on the Xilinx ZCU104. Compared to the algorithm accuracy of ORB-SLAM2, the accuracy of this accelerator is within 5%, and the frame rate has increased to 108 fps. When compared to other hardware accelerators of the same period, the lookup table usage is reduced by 32.7%, the flip-flop (FF) usage is reduced by 41.17%, while the frame rate is increased by 1.4x and 0.74x.