基于质量保证前移的TSV硅转接板检验评价方法

刘莹莹; 刘沛; 付琬月; 付予; 张立康

doi:10.20193/j.ices2097-4191.2024.07.003

PDF(9532 KB)

集成电路与嵌入式系统 ›› 2024, Vol. 24 ›› Issue (7) : 19-24. DOI: 10.20193/j.ices2097-4191.2024.07.003

集成电路可靠性研究专栏

基于质量保证前移的TSV硅转接板检验评价方法

作者信息 +

Quality and reliability evaluation methods for TSV silicon interposers based on assurance forward movement

Author information +

文章历史 +

摘要

TSV作为目前公认最先进的新型高密度封装工艺之一,其结构工艺极为复杂,当前国内鲜有大规模应用及工程适用的质量与可靠性评价方法,相关统一标准尚未完全建立。本文以目前相对成熟并已形成行业共识的2.5D封装中TSV硅转接板为对象,结合其工艺结构特点以及实际产品生产试验的一线数据,研究提出了基于保证前移TSV硅转接板质量检验及可靠性评价方法,为TSV工艺产品的工艺质量监控、检验评价、可靠性保证及相关标准规范制定提供了一套成熟的解决方案。

Abstract

As one of the most advanced new high-density packaging processes, TSV has an extremely complex structural process. Currently, there are few quality inspection and reliability evaluation methods for large-scale applications and engineering applications in China, and relevant unified standards have not been fully established. This paper focuses on TSV silicon interposers in 2.5D packaging, which are the relatively mature and reach the industry consensus. Combining its process structure characteristics and front-line data from actual product production testing, the quality inspection method and the reliability evaluation method for TSV silicon interposers based on the forward movement of quality assurance are studied. A mature solution is established for the process quality monitoring, inspection evaluation, reliability assurance, and the establishment of related standards and specifications for TSV process products.

导出引用

刘莹莹, 刘沛, 付琬月, 等. 基于质量保证前移的TSV硅转接板检验评价方法[J]. 集成电路与嵌入式系统. 2024, 24(7): 19-24 https://doi.org/10.20193/j.ices2097-4191.2024.07.003

LIU Yingying, LIU Pei, FU Wanyue, et al. Quality and reliability evaluation methods for TSV silicon interposers based on assurance forward movement[J]. Integrated Circuits and Embedded Systems. 2024, 24(7): 19-24 https://doi.org/10.20193/j.ices2097-4191.2024.07.003

中图分类号： TN407 (测试和检验)

参考文献

列表( 原文顺序 | 文献年度倒序 | 文中引用次数倒序 ) 可视化分析

[1]

缪立明, 张海霞. 微系统和纳米工程研究领域的最新进展[C]// 微系统与纳米工程国际会议(MINE2018)暨第5届微系统与纳米工程国际研讨峰会,中国科学院电子学研究所,2018.

MIAO

L M

, ZHANG

H X

. Recent advances in the field of Microsystems and Nanoengineering[C]// International Conference on Microsystems and Symposium (MINE2018) and the 5th International Nano-Engineering.Institute of Electronics,Chinese Academy of Sciences, 2018 (in Chinese).

本文引用 [1]

[2]	朱恒静, 张延伟, 张伟. 微系统产品宇航应用可靠性保证关键技术[J]. 电子产品可靠性与环境试验, 2020, 38(5):12-15. ZHU H J, ZHANG Y W, ZHANG W. The Key Technologies of Reliability Assurance for Mlicrosystem Products[J]. Electronic Productreliability and Environmental Testing, 2020, 38(5):12-15 (in Chinese). 本文引用 [1]

[3]	KOYANAGI M, FUKUSHIMA T, TANAKA T. High-density through silicon vias for 3-D LSIs[J]. Proceedings of the IEEE, 2009, 97(1):49-59. 本文引用 [1]

[4]	唐磊, 郭雁蓉, 赵超, 等. 基于硅通孔的信息处理微系统关键技术研究[J]. 遥测遥控, 2021, 42(5):55-62. TANG L, GUO Y R, ZHAO CH, et al. Research on key technologies of information processing microsystem based on Through Silicon Vias[J]. Journal of Telemetry,Tracking and Command, 2021, 42(5):55-62 (in Chinese). 本文引用 [2]

[5]	吴道伟. 高密度2.5D TSV转接板关键技术研究[D]. 西安: 西安电子科技大学, 2022.DOI:10.27389/d.cnki.gxadu.2021.000213. WU D W. The Research on Key Technologies of High-density 2.5D TSV Interposer[D]. Xi'an: Xidian University, 2022.DOI:10.27389/d.cnki.gxadu.2021.000213 (in Chinese). 本文引用 [3]

[6]	DANIEL H JUNG, YOUNGWOO KIM, JONGHOON J KIM, et al. Through and Analysis[J]. IEEE Silicon Via (TSV) Defect Modeling, Measurement,Transactions on Components Packaging and Manufacturing Technology, 2017, 7(1):138-152. 本文引用 [1]

[7]	JONG BUM LEE, JIE LI AW, MIN WOO RHEE.3D TSV Six-Die Stacking of 20 mu m-Pitch Bumps on Large-Scale and Reliability Assessment Dies[J]. IEEE Transactions on Components Packaging and Manufacturing Technology, 7(1):33-38. 本文引用 [1]

[8]	YU-CHEN HU, YU-CHIEH HUANG, PO-TSANG HUANG, et al. An Advanced 2.5-D Heterogeneous Integration Packaging for High-Density Neural Sensing Microsystem[J]. IEEE Transactions Electronic Devices, 2017, 64(4):1666-1673 (in Chinese). 本文引用 [1]

[9]	秦飞, 王珺, 万里兮, 等. TSV结构热机械可靠性研究综述[J]. 半导体技术, 2012, 37(11):825-831. QIN F, WANG J, WAN L X, et al. Review on the Thermal Mechanical Reliability of TSV Structures[J]. Semiconductor Technology, 2012, 37(11):825-831 (in Chinese). 本文引用 [1]

[10]	陈全胜, 罗纳德 J 古德曼, L 拉斐尔赖夫, 等. 晶圆级3D IC 工艺技术[M]. 单光宝,等译. 北京: 中国宇航出版社, 2016. CHEN Q SH, RONALD DING GOODMAN, L RAZOR LAVEF, et al. Wafer-Level 3D IC Process Technology[M]. SHAN G B,Translated. Beijing: China Aerospace Publishing, 2016 (in Chinese). 本文引用 [1]

[11]	李磊. 基于AOI的PCBA 缺陷检测应用研究[D]. 廊坊: 北华航天工业学院, 2024.DO1:10.27836/d.cnki.gbhht.2023.000051. LI L. Research on Applicattion of AOI Based PCBA Defect Detection[D]. Langfang:North China Institute of Ae: rospace Engineering, 2024.DO1:10.27836/d.cnki.gbhht.2023.000051 (in Chinese). 本文引用 [1]

[12]	鲜飞. 高密度封装技术推动测试技术发展[J]. 电子工业专用设备, 2008(2):32-35. XIAN F. Testing Technology Development Promoted by HDI Packaging Technology[J]. Equipment for Electronic Products Manufacturing, 2008(2):32-35 (in Chinese). 本文引用 [2]