随着神经网络模型日益复杂,片上网络(Network-on-Chip, NoC)在异构计算系统中扮演着关键通信角色。然而,传统NoC仿真工具普遍缺乏对矩阵处理单元与RISC-V可编程核等异构计算单元的支持,难以满足大规模人工智能任务对实时性、吞吐量与能效的需求。为应对上述挑战,提出并实现了一种面向异构计算的行为级NoC仿真框架,具备高精度节点建模、动态流水线机制、混合任务感知路由算法以及全链路可视化调试能力。实验结果表明,本文框架在平均延迟、吞吐量与可视化调试效率方面相较传统方法均显著提升,尤其在混合任务流和硬件故障场景下展现出更高的稳定性与可扩展性,为下一代智能计算平台的NoC设计与优化提供了重要支撑。

As neural network models become increasingly complex, Network-on-Chip (NoC) plays a critical communication role in heterogeneous computing systems. However, the traditional NoC simulation tools generally lack support for heterogeneous computing units such as matrix processing units and RISC-V programmable cores, making it difficult to meet the requirements of large-scale AI tasks in terms of real-time performance, throughput, and energy efficiency. To address these challenges, this paper proposes and implements a behavior-level NoC simulation framework for heterogeneous computing. The framework features high-precision node modeling, a dynamic pipelining mechanism, a hybrid task-aware routing algorithm, and full-path visualization and debugging capabilities. The experimental results demonstrate that the proposed framework significantly outperforms traditional methods in average latency, throughput, and visualization debugging efficiency. Notably, it exhibits greater stability and scalability in scenarios involving hybrid task flows and hardware faults, providing strong support for the design and optimization of NoC in next-generation intelligent computing platforms.