随着集成电路复杂度和集成度的提高,诊断驱动的良率分析在加快物理故障分析和良率提升中愈发重要,但基于扫描测试的扫描链故障诊断精度低的问题却是DDYA的薄弱环节。文中研究了基于硬件架构改进的扫描链诊断技术—边路扫描,该技术通过时钟域或布局布线约束将扫描链进行分组,并为组内相邻扫描链引入循环移位的边路传输路径,将故障链数据传输至正常链后移出,再结合边路诊断算法对数据进行分析,实现了对多种故障情形的精准诊断。该架构较二维扫描具有更低的硬件开销,较双向扫描具有更高的诊断精度。基于多个电路的对比实验结果表明,相较基于软件的诊断技术,边路扫描的单故障诊断精度提升最高可达41%,双故障提升最高可达80%,三故障提升最高可达168%;同时,在各类故障情形中,诊断时间均缩短了90%以上,最高可缩短99%。研究证明了边路扫描诊断技术的可行性、稳定性、时间优势和精度优势,为复杂集成电路故障诊断提供了更高效、精准的解决方案。

With the increasing complexity and integration levels of integrated circuits, Diagnosis-Driven Yield Analysis (DDYA) has become increasingly important in accelerating physical failure analysis and improving yield. However, the low diagnostic resolution of scan chain diagnosis based on scan testing remains a weak link in DDYA. This thesis studies a scan chain diagnosis based on hardware architecture improvement-sideway scan. This technique groups scan chains through clock domain or layout constraints and introduces a cyclic shift sideway transmission path between adjacent scan chains within each group. By transmitting data from the faulty chain to the normal chain and then unloading it, followed by analysis using the sideway diagnostic algorithm, the technique enables precise diagnosis of various fault scenarios. This architecture offers lower hardware overhead compared to the two-dimensional scan and higher diagnostic resolution compared to the bidirectional scan. Comparative experiments across multiple circuits demonstrate that, compared to software-based scan chain diagnosis, Sideway Scan achieves up to 41% improvement in single-fault diagnosis resolution, up to 80% in double-fault diagnosis, and up to 168% in triple-fault diagnosis. Meanwhile, in various fault scenarios, diagnosis time is reduced by over 90%, with the maximum reduction reaching 99%. The study demonstrates the feasibility, stability, time advantage, and diagnostic resolution advantage of the sideway scan, providing a more efficient and precise solution for fault diagnosis in complex integrated circuits.