本文面向超高频RFID芯片的应用需求，设计并实现了一种高效稳定的电磁波能量获取电路。该电路系统由整流电路、基准电路和稳压电路构成，旨在为芯片其他模块提供可靠电源。重点研究了差分整流电路在-11dBm低输入功率下实现67%的转换效率及1.84V输出电压；设计了超低功耗CMOS基准电路，其电压/电流温度系数分别低至34.9ppm/°C和18.4ppm/°C，电源抑制比（PSRR）在100Hz时优于-93dB；采用LDO结构的稳压电路，在负载变化时展现出良好的负载调整率41.28mV/mA。同时设计了时钟、复位及解调和调制电路。该电路采用CMOS 180nm工艺设计，版图面积为341μm×346μm。后仿真结果表明，整体功耗为6μW。流片测试结果表明各项性能指标均满足超高频RFID芯片对高转换效率和电源稳定性的要求。

This paper presents the design and implementation of a highly efficient and stable electromagnetic wave energy harvesting circuit targeting ultra-high-frequency (UHF) RFID applications. The system consists of a rectifier, a reference circuit, and a voltage regulator, collectively providing a reliable power supply for other chip modules. Key achievements include: a differential rectifier achieving 67% power conversion efficiency (PCE) with 1.84 V output at -11 dBm input power; an ultra-low-power CMOS reference circuit with temperature coefficients of 34.9 ppm/°C (voltage) and 18.4 ppm/°C (current), and a power supply rejection ratio (PSRR) better than -93 dB at 100 Hz; and an LDO-based voltage regulator exhibiting a load regulation of 41.28 mV/mA under varying load conditions. Additionally, clock, reset, demodulation, and modulation circuits are integrated. The circuit is implemented in a 180 nm CMOS process, occupying a layout area of 341μm × 346μm. Post-layout simulations indicate a total power consumption of 6 μW. Silicon measurements confirm that all performance metrics meet the requirements for high conversion efficiency and power supply stability in UHF RFID chips.