本文设计并实现了一种面向桥梁结构健康监测的FFT硬件加速器与上位机系统。硬件部分采用顺序型结构的基4 FFT架构，以单蝶形复用方式完成运算，在保证功能完整性的同时有效降低资源开销与功耗，实现4点、16点、64点、256点FFT点数可配置。为实现数据交互与可视化，本研究进一步开发了上位机平台，实现对加速器的参数配置、运行控制和频域结果的实时显示与分析。硬件加速器同时在CMOS 180nm工艺下完成验证，可在100MHz工作频率下保持稳定运行。本系统应用于桥梁振动信号处理，能够准确提取主要频率分量，满足桥梁结构健康监测对实时性、精度和能效的综合需求。

This paper designs and implements an FFT hardware accelerator and host computer system for bridge structural health monitoring.The hardware adopts a sequential 4-base FFT architecture with single-butterfly multiplexing to perform computations.This approach ensures functional integrity while effectively reducing resource overhead and power consumption,enabling configurable FFT sizes of 4,16,64,and 256 points.To enable data interaction and visualization,a host computer platform was further developed for parameter configuration, operational control,and real-time display and analysis of frequency-domain results.The hardware accelerator was verified under CMOS 180nm process conditions and maintains stable operation at 100MHz.Applied to bridge vibration signal processing,this system accurately extracts primary frequency components, meeting the comprehensive requirements of real-time performance,precision, and energy efficiency for bridge structural health monitoring.