在激光打印机的硒鼓芯片中，经射频前端及ADC处理后的32位数据后需进行加密，以保障数据传输与存储过程的安全性。针对硒鼓芯片硬件资源受限、关键路径延迟较大以及吞吐率受限等问题，针对资源受限安全认证场景下SM3硬件实现存在的关键路径较长和资源利用效率受限等问题，本文提出一种面向嵌入式级别硬件资源约束的SM3结构优化方案。本文采用FPGA作为硬件原型验证平台，并在综合实现过程中引入资源约束，以模拟嵌入式级别门电路资源条件下的实现效果，围绕数据填充、消息扩展与压缩函数三个关键模块开展协同优化：采用有限状态机驱动的流水线式动态填充结构替代传统串行填充逻辑；基于移位寄存器构建滑窗流水线，实现消息扩展与压缩运算的时序重叠；在压缩函数关键路径中引入4:2压缩器结构，对多操作数累加逻辑进行重构，从而降低关键路径延迟并减少单次压缩运算所需时钟周期。测试结果表明，该设计在Xilinx Zynq-7000系列FPGA上验证通过，在最高139 MHz工作频率下实现35.56 Gb/s吞吐率，硬件资源占用为1492 Slices。与同类方案相比，本文方案在吞吐率与资源开销之间取得更优的综合权衡，适用于对性能与资源效率均有要求的资源受限应用场景。

In the toner cartridge chip of a laser printer, the 32-bit data processed by the RF front-end and ADC requires encryption to ensure the security of data transmission and storage. Addressing challenges such as limited hardware resources, significant critical path delays, and constrained throughput in the drum chip, this paper adopts FPGA as the hardware prototype verification platform and introduces resource constraints during the comprehensive implementation process to simulate the implementation effect under embedded-level gate circuit resource conditions. Collaborative optimization focuses on three key modules: data padding, message expansion, and compression functions. A pipeline-based dynamic padding structure driven by finite state machines replaces traditional serial padding logic. a sliding-window pipeline based on shift registers to achieve temporal overlap between message expansion and compression operations; and a 4:2 compressor structure within the compression function's critical path, reconfiguring multi-operand accumulation logic to reduce critical path latency and decrease clock cycles per compression operation. Test results demonstrate that this design has been validated on Xilinx Zynq-7000 series FPGAs, achieving a throughput of 35.56 Gb/s at a maximum operating frequency of 139 MHz, with hardware resource utilization of 1492 Slices. Compared to similar approaches, this solution achieves a superior trade-off between throughput and resource overhead, making it suitable for resource-constrained applications demanding both performance and resource efficiency.