摘要
本文描述一种使用斩波稳定技术实现的低1/f噪声宽带低压差线性稳压器LDO。借助于斩波技术,可实现的LDO输出噪声在最差Corner下的输出噪声为:10Hz时为139nV/√Hz;100Hz时为64.7nV/√Hz;1kHz时为36.3nV/√Hz。由于1/f噪声拐点已低至赫兹级别,因此可用于给信号带宽为赫兹级别的模块供电。文章提出的LDO在误差放大器和输出功率管之间加入电流反馈缓冲器(CFA),可实现电流快速补偿机制,在实现非常高的信噪比(SNR)的同时提高电源抑制和快速供电能力。CFA的加入亦将误差放大器和PMOS功率管之间的低频极点撕裂为两个较高频率的极点,拓展了LDO带宽,实现了较高的PSRR。
Abstract
This paper describes a LDO with low 1/f noise and wide bandwidth. With the help of chopping technology, the achievable output noise of LDO is 139nv/√Hz at 10Hz, 64.7nv/√Hz at 100Hz, and 36.3nv/√Hz at 1kHz under the worst corner. Since the 1/f noise corner is as low as Hertz level, it can be used to power the modules whose signal bandwidth is Hertz level. The LDO proposed in this paper also adds the current fast compensation mechanism (CFA) and the fast compensation current mechanism at the load end of the output regulator, which can not only achieve a very high SNR, but also improve the power supply suppression energy and fast power supply capacity. The CFA also splits the low frequency pole between the amplifier and the PMOS regulator into two higher frequency poles, which extends the LDO bandwidth and achieves a higher PSRR.
关键词
斩波稳定 /
宽带LDO /
1/f 噪声 /
电流反馈缓冲器 /
SOC电源管理
Key words
Chop Stable /
LDO /
1/f Noise /
Current Feedback Amplifier /
Power Management of SOC
张弓, 杨昆明, 张芳芳.
基于SOC的低1/f噪声CMOS斩波低压差稳压器[J]. 集成电路与嵌入式系统. 0 https://doi.org/10.20193/j.ices2097-4191.2026.0050
A Low 1/f Noise CMOS Chop-LDO Design for RF SOC[J]. Integrated Circuits and Embedded Systems. 0 https://doi.org/10.20193/j.ices2097-4191.2026.0050
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基金
广东省重点领域研发计划项目(2024B0101020005)