针对射频收发机在实际应用中信号链路可能存在信号饱和导致性能恶化等问题，本文设计了一款可集成于射频收发机内部的片上饱和检测电路。该饱和检测电路主要由基于运算放大器的能量检测电路、参考电压产生电路、静态迟滞比较器组成，并进行针对性优化实现饱和检测电路的低功耗及小型化。其中针对能量检测电路采用低增益带宽积的运放来实现滤波，可省去低通滤波器从而大幅度减小面积开支，针对参考电压产生电路实现双档位温度码复用减小译码器开支，从而减小面积及功耗开销。本设计基于40nm CMOS工艺，已完成流片，其载波频率为800kHz，检测速度为80kHz，最终占据的面积仅为30um*160um，功耗为42.9 uW。

To address the potential performance degradation caused by signal saturation in the signal chain of RF transceivers during practical operation, this work presents an on-chip saturation detection circuit that can be integrated into RF transceivers. The proposed saturation detection circuit mainly consists of an energy detection circuit based on an operational amplifier, a reference voltage generation circuit, and a static hysteresis comparator. Targeted optimizations are implemented to achieve low power consumption and a compact circuit area. Specifically, the energy detection circuit employs an operational amplifier with a low gain-bandwidth product (GBW) to realize the filtering function, thereby eliminating the need for an additional low-pass filter and significantly reducing the area overhead. In the reference voltage generation circuit, a dual-range temperature-code multiplexing scheme is adopted to reduce the hardware overhead of the decoder, thereby further reducing both the circuit area and power consumption. The proposed circuit is designed and fabricated in a 40-nm CMOS process. The carrier frequency is 800 kHz, and the detection speed reaches 80 kHz. The fabricated circuit occupies an area of only 30 μm × 160 μm, with a power consumption of 42.9 μW.