基于RISCV架构的CORDIC指令集设计与实现*

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集成电路与嵌入式系统 ›› 2022, Vol. 22 ›› Issue (8) : 20-23.

专题论述

基于RISCV架构的CORDIC指令集设计与实现^*

郑添^1,2, 蔡刚^1,2,3, 黄志洪^1,3

作者信息 +

Design and Implementation of CORDIC Instruction Set Extension Based on RISC-V Processor

Zheng Tian^1,2, Cai Gang^1,2,3, Huang Zhihong^1,3

Author information +

文章历史 +

摘要

本文提出了一种基于RISC-V架构的CORDIC指令集及实现方法,可直接减少执行的指令数量,通过采用独热码编码来减少译码逻辑资源的消耗,通过复用处理器算术逻辑单元来减少算术逻辑资源的消耗,通过预存特殊角度结果来减少计算时间,通过优化选择电路来提高工作频率。该方法在Zynq 7020平台上进行了实现。结果表明,相较于使用基础处理器指令计算的方法,指令数量压缩了97%,计算时间减少了43%;相较于传统CORDIC电路进行计算的方法,寄存器资源减少了79%,工作频率提升了65%,计算时间减少了39%。

Abstract

In the paper,a proceccor with CORDIC instruction set extension based on RISC-V architecture is proposed,which can directly reduce the number of executed instructions.One-hot encoding is used to reduce the consumption of logic resources used for decoding.By reusing the processor's arithmetic logic unit can reduce the logic resource consumption used for realizing arithmetic logic.The calculation time is reduced by prestoring the special angle results.And the operating frequency is improved by optimizing the selection circuit.The proposed circuit is implemented on the Zynq 7020 platform.Compared with the method of using basic processor instruction to calculate,the number of instructions is reduced by 97% and the calculation time is reduced by 43%.Compared with the traditional CORDIC circuit calculation method,the register resources are reduced by 79%,the operating frequency is increased by 65%,and the calculation time is reduced by 39%.

导出引用

郑添, 蔡刚, 黄志洪. 基于RISCV架构的CORDIC指令集设计与实现^*[J]. 集成电路与嵌入式系统. 2022, 22(8): 20-23

Zheng Tian, Cai Gang, Huang Zhihong. Design and Implementation of CORDIC Instruction Set Extension Based on RISC-V Processor[J]. Integrated Circuits and Embedded Systems. 2022, 22(8): 20-23

中图分类号： TP368.

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