针对目前ADC采样存在的集成化、成本和功耗相互制约等问题,实现了一种基于TDC的多通道高速采样方法,精度不受ADC采样位宽限制,只与所用FPGA芯片的硬件参数和软件设计有关,且采样通道数只与可配置的LVDS口的数量和FPGA芯片资源大小相关。与传统ADC采样方法不同,首先,设计采集电路,用已知连续阈值信号作比较器阈值电压,TDC记录信号越过阈值时间获得采样点;其次,探究阈值信号和比较器对采样信号的影响,统计各影响因素的误差并寻找最优解;最后,总结采样规律并分析其适用性。
Abstract
Aiming at the problems of integration,cost and power consumption of ADC sampling,a multi-channel high-speed sampling method based on TDC is proposed in the paper.The sampling accuracy is not limited by the ADC sampling bit width,but only related to the hardware parameters and software design of the FPGA chip used.The number of sampling channels is only related to the number of configurable LVDS ports and the size of FPGA chip resources.Different from the traditional ADC sampling method,the first step is to design the acquisition circuit,use the known continuous threshold signal as the comparator threshold voltage,and TDC records the signal to obtain the sampling point when it crosses the threshold time.Secondly,the influence of threshold signal and comparator on the sampled signal is investigated,and the error of each influencing factor is counted to find the optimal solution.Finally,the sampling rule is summarized,and its applicability is analyzed.
关键词
ADC /
TDC /
连续阈值 /
多通道高速采集
Key words
ADC /
TDC /
continuous threshold /
multi-channel high-speed acquisition
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基金
*山西省基础研究计划项目(20210302124545)。
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