设计了基于RISC-V和MAX2830的无线通信系统架构。采用开源RISC-V软核作为主控单元,其指令架构精简易于集成拓展;对于数字基带单元,基于FPGA平台进行通信算法移植优化研究,设计采用了开放式自有协议结构并兼容BLE通信协议。针对射频前端收发单元,设计了基于MAX2830的射频方案实现无线信号收发电路。对系统平台进行通信测试验证,性能指标满足设计需求,接收灵敏度达-88 dBm,最大发射功率达19 dBm。该软件无线平台通过FPGA可编程逻辑实现模块化设计和动态重构通信模式,适用于多种通信场景。
Abstract
In the paper,a wireless communication architecture based on RISC-V and MAX2830 is designed.The open-source RISC-V soft core is used as the main control unit,and reduce instruction architecture is simple to integrate and expand.For digital baseband unit,the communication algorithm transplantation and optimization research are carried out based on the FPGA platform.The design adopts an open proprietary protocol and is compatible with the BLE communication protocol.A transceiver circuit based on the MAX2830 radio frequency scheme is designed for the RF front-end.With communication verification on the system platform,the performance indicators meet the design requirements.The sensitivity is up to -88 dBm,and the maximum transmission power reaches 19 dBm.This software radio platform achieves modular design and dynamic reconstruction of communication modes through FPGA,which is suitable for various communication scenarios.
关键词
RISC-V /
MAX2830 /
FPGA /
自有协议 /
软件无线平台
Key words
RISC-V /
MAX2830 /
FPGA /
proprietary protocol /
software radio platform
{{custom_sec.title}}
{{custom_sec.title}}
{{custom_sec.content}}
参考文献
[1] 李翔,黄忠凡,赵文超,等.一种宽频段软件无线电平台的设计与实现[J].电讯技术,2022,62(7):898-903.
[2] 张澄安,李保国,杜志毅,等.基于软件无线电的雷达嵌入式通信验证系统[J].信号处理,2021,37(11):2041-2053.
[3] N Kumar,M Rawat,K Rawat.Software-Defined Radio Transceiver Design Using FPGA-Based System-on-Chip Embedded Platform With Adaptive Digital Predistortion[J].IEEE Access,2020(8):214882-214893.
[4] 潘树朋,刘有耀.RISC-V微处理器以及商业IP的综述[J].单片机与嵌入式系统应用,2020,20(6):5-8.
[5] 许霁航,杨靓,娄冕,等.基于RISC-V调试协议的片上调试系统设计与实现[J].微电子学与计算机,2022,39(12):86-91.
[6] 邓天传,胡振波.一种超低功耗的RISC-V处理器流水线结构[J].电子技术应用,2019,45(6):50-53.
[7] X Chen,A Alghaihab,Y Shi,et al.A Crystal-Less BLE Transmitter With Clock Recovery From GFSK-Modulated BLE Packets[J].IEEE Journal of Solid-State Circuits,2021,56(7):1963-1974.
[8] 吴进,赵新亮,赵隽.LoRa物联网技术的调制解调[J].计算机工程与设计,2019,40(3):24-29.
[9] J V Velasco,O L Gandara,R A Lopez,et al.Low Complexity Maximum-Likelihood Detector for IoT BLE Devices[J].IEEE Internet of Things Journal,2020,7(6):4737-4745.
[10] 陈艳,谷宪,张昱桐.2.4GHz RFID低功耗发射机GFSK调制器设计[J].中国集成电路,2020,29(7):53-56.
[11] M S Pereira,J T Sousa,J C Freire,et al.A 1.7mW-92dBm Sensitivity Low-IF Receiver in 0.13um CMOS for Bluetooth LE Applications[J].IEEE Transactions on Microwave Theory and Techniques,2019,67(1):332-346.
[12] 汪永峰,卜刚.基于System Verilog的超高频RFID标签数字基带设计与研究[J].电子技术应用,2021,47(1):36-40.
[13] M Ding,P Zhang,Y He,et al.A Bluetooth 5 Transceiver With a Phase-Tracking RX and Its Corresponding Digital Baseband in 40-nm CMOS[J].IEEE Journal of Solid-State Circuits,2021,56(1):254-266.
基金
*陕西省教育厅专项科研计划项目(22JK0486);西安明德理工学院科研基金项目(2021XY01L08)。
PDF(1629 KB)
