PDF(9262 KB)
PDF(9262 KB)
PDF(9262 KB)
Chiplet技术发展与挑战
Development and challenges of Chiplet technology
随着半导体工艺尺寸逐渐逼近物理极限,芯片的功耗、性能和面积随工艺制程进步而带来的提升越来越小,半导体技术进入“后摩尔时代”。为进一步满足机器学习与人工智能等信息通信行业快速发展带来的高带宽通信需求,基于先进的互连和封装技术的Chiplet技术步入了我们的视野。Chiplet技术将原来的复杂多功能SoC芯片拆成多个小面积、低成本、不同工艺节点的小芯片,再进行重新组装,因其良率高、成本低、集成度高、性能强大、灵活性好、上市时间快等优点受到学术界和产业界的高度关注。本文对Chiplet的技术特征、优势、发展历史以及具体应用进行了梳理和阐述,同时详细介绍了Chiplet的关键核心技术尤其是Chiplet D2D互连技术,最后叙述了Chiplet现存的技术问题与挑战,并给出了未来发展建议。
As the size of semiconductor technology gradually approaches the physical limit,the progress of process technology has led to a decreasing improvement in the power consumption,area,and other performance of chips,semiconductor technology has entered the “post-Moore era”.In order to further meet the high bandwidth communication needs brought about by the rapid development of machine learning,artificial intelligence,and other information and communication industries,Chiplet technology which based on advanced interconnection and packaging techniques,steps into the picture.Chiplet technology disassembles the original complex multifunctional SoC chip into small chips with small area,low cost,and different process nodes,and assembles them through advanced packaging technology,which has received high attention from academia and industry due to its advantages of high yield,low cost,high integration,strong performance,good flexibility,and fast time-to-market.This paper summarizes and elaborates on the technical characteristics,advantages,development history,and specific applications of Chiplet.Meanwhile,the core technologies of Chiplet,especially Chiplet D2D interconnect technology,are introduced in detail.Finally,the existing technical issues and challenges of Chiplet are described,and the suggestions for future development are put forward.
芯粒 / 裸片互连 / 高速串行接口 / 单端并行接口 / UCIe / SerDes
Chiplet / D2D / high-speed serial interface / single-ended parallel interface / UCIe / SerDes
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