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PDF(2827 KB)
芯粒互连数据接口中用于噪声消除的弦和信令技术
Chord signaling techniques for noise cancellation in chiplet interconnect data interfaces
芯粒(Chiplet)技术可以提升集成芯片良率、降低研发成本并提升效率,因此成为目前的研究热点。不同芯粒之间需要高速数据接口进行互连通信。为提升总带宽密度,芯粒互连多采用单端信号传输数据,因此会受共模噪声、同步开关噪声以及串扰噪声的影响。弦和信令通过对传输数据编解码将单端信号转换为伪差分信号,可以抑制噪声,提高信号传输质量。同时,弦和信令作为一种调制方式,与工艺、架构等无关,工艺移植性良好,因此得到广泛应用。本文对常见的弦和信令进行了回顾,并分析总结了其性能参数,最后对弦和信令的发展进行了展望。
Chiplet technology has garnered significant attention owing to its potential to enhance integrated chip yield,reduce research costs,and bolster efficiency.To facilitate the interconnection of distinct chips,high-speed data interfaces are imperative.With the aim of augmenting total bandwidth density,chiplet interconnections predominantly employ single-ended signals for data transmission,which are susceptible to common-mode noise,synchronous switching noise,and crosstalk noise.Chord signaling transforms single-ended signals into pseudo-differential signals through encoding and decoding transmitted data,enabling noise suppression and enhancement of signal transmission quality.Furthermore,as a modulation technique,chord signaling is extensively adopted due to its process independence,architectural flexibility,and strong process portability.This paper conducts a comprehensive review of prevalent chord signaling techniques,including analysis and summary of their performance.Finally,it offers a perspective on the chord signaling development.
芯粒 / 共模噪声 / 同步开关噪声 / 串扰噪声 / 弦和信令
Chiplet / common-mode noise / simultaneous switching noise / crosstalk noise / chord signaling
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As a heterogeneous integration technology, the chiplet-based design technology integrates multiple heterogeneous dies of diverse functional circuit blocks into a single chip by using advanced packaging technology, which is a promising way to tackle the failure of Moore’s law and Dennard scaling. Currently, as process nodes move forward, dramatically rising cost, design cycle, and complexity are driving industry to focus on the chiplets. Chiplets allows IC designers to merge dies fabricated at different process nodes and reuse them in different projects, which helps to reduce the cost during design and improve yield. In this review, we look back at the industry’s efforts over the past decade and summary the concepts and techniques associated with chiplets. In the end, a discussion and conclusion will be given to forecast the future of chiplets.
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项少林, 郭茂, 蒲菠, 等. Chiplet 技术发展现状[J]. 科技导报, 2023, 41(19):113-131.
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