应用于高速图像传感器的高线性度Latch-ADC

潘佳明; 熊波涛; 李兆涵; 常玉春

doi:10.20193/j.ices2097-4191.2024.05.005

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集成电路与嵌入式系统 ›› 2024, Vol. 24 ›› Issue (5) : 42-47. DOI: 10.20193/j.ices2097-4191.2024.05.005

CMOS图像传感器研究专栏

应用于高速图像传感器的高线性度Latch-ADC

潘佳明 ¹ ,
熊波涛 ¹ ,
李兆涵 ² ,
常玉春 ¹^,^*

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High linearity Latch-ADC for high-speed image sensors

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摘要

针对高速应用设备对CMOS图像传感器高速、高线性度的要求,本文在传统SS ADC(Single-Slope ADC,单斜模数转换器)的基础上,实现了一款应用于图像传感器的Latch-ADC,工作频率达到了600 MHz。Latch-ADC可以多列像素共用一个Gray Code计数器,并通过Latch结构快速锁定和存储数据,实现了SS ADC中Counter和SRAM的功能。本文采用110 nm工艺,实现了一种高速12位Latch-ADC。经过仿真验证,本文的Latch-ADC具有高线性度,每次转换的周期为7.094 μs,平均功率为180.3 μW,转换功耗为1.279 nJ.

Abstract

Aiming at the requirement of high-speed and high linearity of CMOS image sensor for high-speed application devices,this paper realizes a Latch-ADC applied to image sensor on the basis of traditional SS ADC (Single-Slope ADC,Single-Slope analog-to-digital converter),with an operating frequency of 600 MHz.Latch-ADC can use multi-column pixels to share a Gray Code Counter,and quickly lock and store data through Latch structure,which realizes the functions of counter and SRAM in SS ADC.In this paper,a high-speed 12bit Latch-ADC is implemented by using 110 nm technology.Through simulation verification,the Latch-ADC in this paper has high linearity,with each conversion period of 7.094 μs,average power of 180.3 μW,and conversion power consumption of 1.279 nJ.

导出引用

潘佳明, 熊波涛, 李兆涵, 等. 应用于高速图像传感器的高线性度Latch-ADC[J]. 集成电路与嵌入式系统. 2024, 24(5): 42-47 https://doi.org/10.20193/j.ices2097-4191.2024.05.005

PAN Jiaming, XIONG Botao, LI Zhaohan, et al. High linearity Latch-ADC for high-speed image sensors[J]. Integrated Circuits and Embedded Systems. 2024, 24(5): 42-47 https://doi.org/10.20193/j.ices2097-4191.2024.05.005

中图分类号： TN433 (BICMOS(双极-MOS混合)集成电路)

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