基于FPGA+ARM的异构列车数据交互系统

陈晓崎; 张丽艳; 刘洋; 李常贤

doi:10.20193/j.ices2097-4191.2024.05.008

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集成电路与嵌入式系统 ›› 2024, Vol. 24 ›› Issue (5) : 60-64. DOI: 10.20193/j.ices2097-4191.2024.05.008

研究论文

基于FPGA+ARM的异构列车数据交互系统

陈晓崎 ¹ ,
张丽艳 ²^,^* ,
刘洋 ¹ ,
李常贤 ¹

作者信息 +

Heterogeneous train data exchange system based on FPGA+ARM

CHEN Xiaoqi ¹ ,
ZHANG Liyan ²^,^* ,
LIU Yang ¹ ,
LI Changxian ¹

Author information +

文章历史 +

摘要

本文设计并实现了基于FPGA的主机与ARM端的数据通信接口。其中,FPGA实现了与主机交互的PCIe接口功能以及与ARM交互的FMC接口功能。本文完成了PCIe接口和FMC接口传输性能测试,同时也进行了主机与ARM的数据回环测试。测试结果表明,本文设计满足了整体的系统设计指标要求,其中PCIe1.0接口速率可达820 MB/s。

Abstract

This paper designs and realizes a data communication interface between the host and ARM based on FPGA is designed and implemented.The PCIe interface function for interacting with the host and the FMC interface function for interacting with ARM are implemented by FPGA.The transmission performance testing of PCIe and FMC interfaces,as well as the data loop testing between the host and ARM had been completed.The test results show that the overall system design requirements have been achieved,with the PCIe 1.0 interface speed reaching 820 MB/s.

导出引用

陈晓崎, 张丽艳, 刘洋, 等. 基于FPGA+ARM的异构列车数据交互系统[J]. 集成电路与嵌入式系统. 2024, 24(5): 60-64 https://doi.org/10.20193/j.ices2097-4191.2024.05.008

CHEN Xiaoqi, ZHANG Liyan, LIU Yang, et al. Heterogeneous train data exchange system based on FPGA+ARM[J]. Integrated Circuits and Embedded Systems. 2024, 24(5): 60-64 https://doi.org/10.20193/j.ices2097-4191.2024.05.008

中图分类号： TP872 (远距离控制和信号、远距离控制和信号系统)

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