基于SRIO的双备份数据传输

焦新泉; 杨建楠; 朱振麟; 徐胜

doi:10.20193/j.ices2097-4191.2024.06.012

PDF(5604 KB)

集成电路与嵌入式系统 ›› 2024, Vol. 24 ›› Issue (6) : 77-82. DOI: 10.20193/j.ices2097-4191.2024.06.012

研究论文

基于SRIO的双备份数据传输

作者信息 +

Dual backup data transmission based on SRIO

Author information +

文章历史 +

摘要

为了解决在特殊条件下数据通道受到外界因素影响导致数据无法传输的问题,提出一种基于SRIO的双备份数据传输设计方案。设计中使用两个独立的SRIO IP核来实现主路通道和备份通道数据的独立传输,同时通过通道选择模块对数据传输通道进行备份选择。该方案以Xilinx的Kintex 7系列FPGA为SRIO的连接设备,物理层以FPGA芯片内部集成的GTX高速串行收发器作为传输基础;传输链路采用“光模块+光缆”代替电缆实现数据的高速可靠传输,该方案已运用到遥测系统数据采集装置项目,实现了FPGA设备间双备份数据传输。

Abstract

In order to solve the problem of data transmission failure caused by external factors affecting data channels under special conditions,a dual backup data transmission design scheme based on SRIO is proposed.In the design,two independent SRIO IP cores are used to achieve independent transmission of data from the main channel and backup channel,and backup selection of data transmission channels is carried out through the channel selection module.This solution uses Xilinx's Kintex 7 series FPGA as the connection device for SRIO,and the physical layer uses the GTX high-speed serial transceiver integrated inside the FPGA chip as the transmission foundation.The transmission link uses "Optical module+optical cable" instead of cable to realize high-speed and reliable data transmission.This scheme has been applied to the telemetry system data acquisition device project to achieve dual backup data transmission between FPGA devices.

导出引用

焦新泉, 杨建楠, 朱振麟, 等. 基于SRIO的双备份数据传输[J]. 集成电路与嵌入式系统. 2024, 24(6): 77-82 https://doi.org/10.20193/j.ices2097-4191.2024.06.012

JIAO Xinquan, YANG Jiannan, ZHU Zhenlin, et al. Dual backup data transmission based on SRIO[J]. Integrated Circuits and Embedded Systems. 2024, 24(6): 77-82 https://doi.org/10.20193/j.ices2097-4191.2024.06.012

中图分类号： TN919

参考文献

列表( 原文顺序 | 文献年度倒序 | 文中引用次数倒序 ) 可视化分析

[1]	刘光祖, 张强, 仲雅莉. 基于RapidIO协议的光纤通信系统设计与实现[J]. 电讯技术, 2013, 53(7):840-844. LIU G Z, ZHANG Q, ZHONG Y L. Design and implementation of fiber optic communication system based on RapidIO protocol[J]. Telecommunication Technology, 2013, 53(7):840-844. (in Chinese) 本文引用 [1]

[2]

郭晋, 王代华, 刘彬, 等. 基于千兆以太网的多通道冲击波超压系统设计[J]. 现代电子技术, 2022, 45(10):31-35.DOI:10.16652/j.issn.1004-373x.2022.10.007.

GUO

, WANG

D H

, LIU

, et al. Design of multi-channel shock wave overpressure system based on Gigabit Ethernet[J]. Modern Electronic Technology, 2022, 45(10):31-35.DOI:10.16652/j.issn.1004-373x.2022.10.007. (in Chinese)

本文引用 [1]

[3]	朱奇凡. 基于PCI Express的光纤通信卡研制[D]. 哈尔滨: 哈尔滨工业大学, 2019.DOI:10.27061/d.cnki.ghgdu.2019.002654. ZHU Q F. Development of fiber optic communication card based on PCI Express[D]. Harbin: Harbin Institute of Technology, 2019.DOI:10.27061/d.cnki.ghgdu.2019.002654. (in Chinese) 本文引用 [1]

[4]	陆晓玲. 基于FPGA和SATA3.0接口的高速大容量存储系统的设计与实现[D]. 南京: 南京邮电大学, 2017. LU X L.Design and implementation of high-speed mass storage system based on FPGA and SATA3.0 interface[D]. Nanjing: Nanjing University of Posts and Telecommunications, 2017. (in Chinese) 本文引用 [1]

[5]	黄靖媛. 高速串行接口RapidIO的设计与验证[D]. 西安: 西安电子科技大学, 2015. HUANG J Y. Design and verification of high-speed serial interface RapidIO[D]. Xi'an: Xi'an University of Electronic Science and Technology, 2015. (in Chinese) 本文引用 [1]

[6]	多卉枫, 任勇峰, 武慧军. 基于SRIO的数据传输设计[J]. 电子测量技术, 2021, 44(21):7-11.DOI:10.19651/j.cnki.emt.2107582. DUO H F, REN Y F, WU H J. Design of data transmission based on SRIO[J]. Electronic Measurement Technology, 2021, 44(21):7-11.DOI:10.19651/j.cnki.emt.2107582. (in Chinese) 本文引用 [1]

[7]	张强. 串行RapidIO互连系统的设计与实现[D]. 南京: 南京理工大学, 2013. ZHANG Q. Design and implementation of serial RapidIO interconnect system[D]. Nanjing: Nanjing University of Science and Technology, 2013. (in Chinese) 本文引用 [1]

[8]	ZHANG B, LIANG J, LIU L, et al. Design of high speed information channel for satellite test based on serial RapidI/O[C]// 2019 14th IEEE International Conference on Electronic Measurement and Instruments(ICEMI),IEEE, 2019:1500-1507.

[9]

朱新忠, 王冠雄, 韦杰, 等. 一种基于Serial RapidIO标准协议的高速交换技术[J]. 航天标准化, 2020(2):8-11.DOI:10.19314/j.cnki.1009-234x.2020.02.003.

ZHU

X ZH

, WANG

G X

, WEI

, et al. A high-speed switching technology based on Serial RapidIO standard protocol[J]. Aerospace Standardization, 2020(2):8-11.DOI:10.19314/j.cnki.1009-234x.2020.02.003. (in Chinese)

[10]	张晓雷. 基于8B/10B+CRC的高速数据长距离可靠传输设计[D]. 太原: 中北大学, 2020.DOI:10.27470/d.cnki.ghbgc.2020.000137. ZHANG X L. Design of high speed data long distance reliable transmission based on 8B/10B+CRC[D]. Taiyuan: North University of China, 2020.DOI:10.27470/d.cnki.ghbgc.2020.000137. (in Chinese)

[11]	陈刚, 康林, 陈航, 等. 基于FPGA的SRIO端点设计与实现[J]. 兵工自动化, 2021, 40(2):49-52. CHEN G, KANG L, CHEN H, et al. Design and implementation of FPGA-based SRIO endpoint[J]. Military Automation, 2021, 40(2):49-52. (in Chinese)

[12]	嵇康, 林茂宽, 李兵强, 等. SRIO与PCI Express的比较[J]. 信息与电脑(理论版), 2016(12):82-84. JI K, LIN M K, LI B Q, et al. Comparison between SRIO and PCI Express[J]. Information and Computer(Theoretical Edition), 2016(12):82-84. (in Chinese)

[13]	吕文强. 基于FPGA SRIO的存储器地面测试台的设计与实现[D]. 太原: 中北大学, 2021.DOI:10.27470/d.cnki.ghbgc.2021.000191. LV W Q. Design and realization of memory ground test bench based on FPGA SRIO[D]. Taiyuan: North University of China, 2021.DOI:10.27470/d.cnki.ghbgc.2021.000191. (in Chinese)

[14]

薛培, 官剑, 邵春伟, 等. 基于FPGA的SRIO多通道控制系统设计与实现[J]. 电子技术应用, 2023, 49(1):107-113.DOI:10.16157/j.issn.0258-7998.222857.

XUE

, GUAN

, SHAO

CH W

, et al. Design and realization of FPGA-based SRIO multi-channel control system[J]. Electronic Technology Application, 2023, 49(1):107-113.DOI:10.16157/j.issn.0258-7998.222857. (in Chinese)

[15]

辛云旭, 文丰, 张凯华. 基于Serial RapidIO的远距离高速数据传输[J]. 电子测量技术, 2021, 44(21):125-132.DOI:10.19651/j.cnki.emt.2107796.

XIN

Y X

, WEN

, ZHANG

K H

. Long-distance high-speed data transmission based on Serial RapidIO[J]. Electronic Measurement Technology, 2021, 44(21):125-132.DOI:10.19651/j.cnki.emt.2107796. (in Chinese)

[16]

李晋涛, 任勇峰, 杨志文, 等. 基于SATA3.0的存储系统优化设计[J]. 电子技术应用, 2021, 47(1):86-90.DOI:10.16157/j.issn.0258-7998.200612.

J T

, REN

Y F

, YANG

ZH W

, et al. Optimized design of storage system based on SATA3.0[J]. Electronic Technology Application, 2021, 47(1):86-90.DOI:10.16157/j.issn.0258-7998.200612. (in Chinese)