Chiplet integrates multiple small chips into a system chip,aiming to achieve various goals such as chip reusability,heterogeneous integration,performance enhancement,and cost reduction.The development trends of the Chiplet primarily encompass heterogeneous integration,innovative interconnects,and advanced packaging.Notably,interface interconnection is the key of Chiplet technology.Interconnection using the design of physical layer interfaces and data transmission protocols,considering factors like process,packaging techniques,power constraints,and requirements of upper-level applications.Serial and parallel interconnects are two choices for chip-to-chip physical layer interfaces,each with its own advantages and application scenarios.Additionally,for different propagation media,emerging interconnect technologies such as optical and wireless interconnects offer higher bandwidth,lower power consumption,and more flexible interconnection topologies.Chiplet is promising to bring significant breakthroughs and advancements to the field of electronics,promoting more efficient,flexible,and innovative chip design and manufacturing.

As the size of semiconductor technology gradually approaches the physical limit,the progress of process technology has led to a decreasing improvement in the power consumption,area,and other performance of chips,semiconductor technology has entered the “post-Moore era”.In order to further meet the high bandwidth communication needs brought about by the rapid development of machine learning,artificial intelligence,and other information and communication industries,Chiplet technology which based on advanced interconnection and packaging techniques,steps into the picture.Chiplet technology disassembles the original complex multifunctional SoC chip into small chips with small area,low cost,and different process nodes,and assembles them through advanced packaging technology,which has received high attention from academia and industry due to its advantages of high yield,low cost,high integration,strong performance,good flexibility,and fast time-to-market.This paper summarizes and elaborates on the technical characteristics,advantages,development history,and specific applications of Chiplet.Meanwhile,the core technologies of Chiplet,especially Chiplet D2D interconnect technology,are introduced in detail.Finally,the existing technical issues and challenges of Chiplet are described,and the suggestions for future development are put forward.

Chiplet technology has garnered significant attention owing to its potential to enhance integrated chip yield,reduce research costs,and bolster efficiency.To facilitate the interconnection of distinct chips,high-speed data interfaces are imperative.With the aim of augmenting total bandwidth density,chiplet interconnections predominantly employ single-ended signals for data transmission,which are susceptible to common-mode noise,synchronous switching noise,and crosstalk noise.Chord signaling transforms single-ended signals into pseudo-differential signals through encoding and decoding transmitted data,enabling noise suppression and enhancement of signal transmission quality.Furthermore,as a modulation technique,chord signaling is extensively adopted due to its process independence,architectural flexibility,and strong process portability.This paper conducts a comprehensive review of prevalent chord signaling techniques,including analysis and summary of their performance.Finally,it offers a perspective on the chord signaling development.

With the development of integrated circuits to the Beyond Moor era,the heterogeneous integration technology has become an emerging direction of microelectronics.The interconnect interface,the key to the heterogeneous integration technology, is critical to heterogeneous integrated chip and system.In order to promote the implementation of heterogeneous integrated interconnect interface, the structure of the heterogeneous integrated chip and system is described and the heterogeneous integration technology is summarized into four technical routes:large chip by integrated chiplets, larger chip by integrated large chips,wafer-level chips and wafer-level systems. The characteristics of the heterogeneous integrated interconnect interface are summarized.The current research status and existing problems in the industry and academia around the heterogeneous integrated interconnect interface are analyzed.Finally,the future development trend and the needed technical characteristics of the heterogeneous integrated interconnect interface are given by this article.

Facing the challenge of the "area wall" in chip design,there is a significant increase in chip manufacturing costs.The chiplet technology enables the production of small area chips using a mature process,and composing by advanced packaging techniques,which can overcome the limitations imposed by the area wall,facilitating agile chip design and reducing overall design costs.Determining an optimal chiplet particle size to meet flexible chip design requirements remains a crucial issue when utilizing chiplet technology.Furthermore,achieving interconnectivity between functional chiplets after dividing chip functions is pivotal for realizing the final functionality of the chip.Therefore,this paper provides a comprehensive review of recent research on chiplet function division,spatial exploration in chiplet design and the influence of chiplet function division on the inter-chip interconnect,while also pointing out that chipet design methodology is an important research direction for the development of chiplet technology in the future.

Substrate integrated waveguide (SIW) filter power dividers (FPDs) are widely used in communication systems.Similar to traditional waveguide resonators,SIW resonators contain numerous transmission modes,which makes the wide stopband characteristics of SIW FPDs difficult to achieve.In this paper,a substrate integrated waveguide filter power divider with ultra-wide resistance implemented by electric excitation is designed.Specifically,a forth-order substrate integrated waveguide filter power divider based on electromagnetic alternating coupling topology with electrical input and electrical output ports is proposed.The lateral coupling is achieved by opening a window on the side of the resonator to achieve magnetic coupling,and the longitudinal coupling is achieved by etching an S-slot line in the coupling window between two adjacent cavities.Multiple higher-order modes can be suppressed through the orthogonal transmission path,so that the simulation and measurement results show that the out-of-band suppression effect of the filter power divider with a center frequency of 35.5 GHz is better than -20 dB respectively in the stopband bandwidths greater than 9f₀ and 3.1f₀.The experimental results are in good agreement with the simulation results.