With the development of high-power microwave technology, strong electromagnetic technologies such as ultra-wideband and high power pose an increasing threat to electronic equipment. Using high-power microwaves to destroy electronic information equipment has become an important way to interfere with communication systems. The protection of high-power microwaves is mainly divided into front-door protection and back-door protection. As an important microwave device for front-door protection, the limiter is also facing higher and higher requirements. This paper first introduces the device characteristics and performance advantages of GaN materials and Schottky diodes, and then introduces the principle and circuit structure of the limiter based on semiconductor devices, and discusses the research progress of the new generation of high-power microwave limiting technology based on GaN Schottky diodes.
As the rapid growth of the signal bandwidth in aerospace data communications, the data rate of laser diode driver(LDD) in aerospace optical fiber communication has enter the era of hundred-gigabits. For the sake of radiation harden and high reliability design, the introduction of extra parasitic factor requires more efforts in the circuit design to compensate the loss of bandwidth at high frequency. This work proposes an adaptive continue time linear equalizer(CTLE) which is based on a SiGe BiCMOS platform giving a programmable loss compensating capability up to 16 dB at 14 GHz.It has the capable of adaptive gain compensation adjustment, supporting up to 25 Gb/s NRZ signal transmission.
Artificial intelligence devices are miniaturized devices that provide system functions, serving as hardware carriers and foundations for spatial environment perception, autonomous judgment, and autonomous task planning. Before being applied in aerospace, these new types of components still face many challenges such as maturity, reliability, radiation resistance, and aerospace applicability. Starting from the analysis of the current development status of artificial intelligence devices both domestically and internationally, this article examines the challenges and countermeasures faced by the aerospace applications of artificial intelligence devices, provides typical cases of quality assurance for artificial intelligence devices, and summarizes relevant suggestions for the subsequent aerospace applications of artificial intelligence devices.
The space radiation-resistant optical transceiver module is capable of realizing high-speed parallel optical-electrical conversion and transmission functions within the space application environment. By employing optical means, it achieves the transmission of high-speed signals, thereby addressing the bottleneck issue of data transmission in spaceborne systems and reducing the overall system weight through an optimized transmission architecture. This advancement holds significant milestone value. This paper provides a detailed analysis of the module's working principles, structural composition, and associated characteristics. Furthermore, it evaluates the functional performance, quality reliability, and environmental adaptability of a particular 12-channel parallel optical transceiver module that is resistant to radiation, considering its specific application context. Based on the product definition and user requirements, a standardized index system and assessment criteria have been developed in a forward-thinking approach, offering guidance for the standardization of novel optical module products.
This work presents a failure analysis study on domestic operational amplifiers, revealing that the main cause of device failure is the short circuit of stacked MIS capacitors induced by process changes. Under low electric fields, the capacitors perform normally, but under high electric fields, Fowler-Nordheim tunneling and defect accumulation caused by hot electron collisions ultimately lead to capacitor short circuits. Using Sentaurus TCAD simulations, we verified the impact of doping atom concentration differences at the interface on the oxide layer growth rate and proposed process improvement recommendations to enhance the reliability of domestic chips.
Communication technology is closely related to social development. The realization of RF circuit had promoted the level of communication technology, and had become one of the hot spots of RF circuit. The difference between RF circuit and digital circuit reflected in the packaging technology. This paper took packaging design and process as the title, and introduced the development status, technical requirements and process route of RF circuit. Electrical packaging consisted of basic principle, packaging design and implementation, which had guiding significance for RF circuit packaging.
The selection of space components is crucial in the space mission. The space environment is complex and harsh, imposing extremely high requirements on the reliability and performance of aerospace components.Traditional component selection methods usually rely on expert experience and a single index evaluation, making it difficult to fully consider the complex correlation and multi-dimensional performance specifications between components. The development of complex network theory provides a new approach for the component selection. In particular, community detection algorithms can help identify the potential relationships and group characteristics among components, thereby optimizing the selection process and achieving precise, rapid, efficient, and flexible selection of aerospace components. In this paper, we will introduce the selection recommendation method for component selection based on complex network community detection algorithm, and propose the evolutionary algorithm based on module degree optimization. The algorithm incorporates a maximum spanning tree coding method based on node similarity, a new method for generating initial populations and a sine-based adaptive variation function, and applies it to two component selection networks. The algorithm effectively detects the community structure in the component selection networks, and realizes the intelligent selection of components.
In this work, a temperature sensor designed for UHF implantable RFID chips is implemented using a 0.18 μm process. The sensor employs MOS transistors as the temperature-sensing elements, with the core design based on a low-power temperature sensing circuit using subthreshold MOS transistors. The sensor utilizes Proportional To Absolute Temperature (PTAT) and Complementary To Absolute Temperature (CTAT) voltage delay generators to form a pulse width generation circuit, which produces pulse width signals that are quantified by a Time-to-Digital Converter (TDC). The core circuit layout area is 298 μm×261 μm, with a temperature measurement range of 35~45℃. Tape-out testing results indicated that, after two-point calibration, the maximum temperature measurement error across three chips was ±0.4 ℃, with a maximum error of ±0.2 ℃ in critical temperature ranges. The measured power consumption was 623 nW. Based on the tape-out results, the current chip's limitations were identified, and directions for future chip structure iterations were proposed.
For the conventional radar target clutter detection technology, the background power level estimation of each azimuth-distance unit is obtained by the recursive update of the continuous scanning period samples in the resolving unit, but this estimation method fails when there are a large number of interfering target samples in the continuous scanning period samples of the resolving unit. In response to this, this paper draws on the sample screening technology in the spatial constant false alarm to the time domain constant false alarm, and proposes an OTSU-CCA-based clutter detector to improve the accuracy of background power level estimation by eliminating the potential interference target samples in the continuous scanning period samples, thereby enhancing the detection performance of clutter map.
Sensors generally employ metals or semiconductors as their sensitive components.When semiconductor materials are subjected to external optical or thermal stimuli, their electrical conductivity undergoes significant changes, leading to temperature drift in the sensor’s output signals. This temperature drift severely impacts the measurement accuracy and application scope of sensors. To enhance their temperature ability, temperature compensation is essential. Due to factors such as the piezoresistive coefficient being influenced by temperature, pressure sensors exhibit temperature drift, and the temperature sensitivity coefficient is typically negative. The design employs a constant current source with a positive temperature coefficient as the excitation driver for the sensor. The wheatstone bridge, after being compensated through series and parallel resistance methods, is then utilized to perform sensitivity temperature compensation on the sensor. Experimental results demonstrate that after undergoing compensation from this two-stage circuit, piezoresistive pressure sensors display stabilized output signals within a range of -50 ℃ to 75 ℃, with an error reduced to less than 0.35%FS. This approach effectively mitigates the impact of temperature drift, thereby enhancing the sensor’s overall performance and reliability across a broader temperature spectrum.
In order to improve the measurement accuracy and resolution of the phase-sensitive receiver,an all-electronic phase-sensitive receiver based on the all-phase Fast Fourier Transform (apFFT) algorithm is designed. The hardware is a two-take-two dual-channel structure, and the process is synchronized by two machines, and the calculation results are output after comparison. The DDS generator is used to build a test platform for simulating and verifying the function of the scheme, and the on-site track circuit combination frame is connected to the field test. The experimental results show that the design can accurately detect the occupancy status of the train in the track section, distinguish the random noise and harmonic signal on the rail. It has strong anti-interference capabilities, with a phase difference measurement error of no more than 0.3°. This scheme is an electronic improvement of the existing microelectronic phase-sensitive track circuit receiver, featuring a simple circuit. The phase difference calculation is completely completed by software, resulting in the high reliability. It can be used for the coded or non-coded sections of the 25 Hz phase-sensitive track circuits powered by 50 Hz alternating current traction.
This paper explores the hardware design and implementation of a Long-Term Post Filter (LTPF) in detail based on the LC3 encoding protocol. The research includes an exploration of the fundamental principles of LTPF, the hardware design architecture, and its implementation and testing on FPGA. The design is validated using an Altera(acquired by Intel) MAX 10 development board. The results demonstrate significant improvements in processing efficiency and achieve hardware acceleration of the LTPF with minimal resource consumption. Additionally, a comparison is made between the hardware implementation and a C-language fixed-point program on the STM32 platform, highlighting the advantages of the hardware design in terms of processing speed and resource utilization. The research results indicate that, although the current design outperforms the software architecture, there is still room for system performance improvement through design optimizations using logic reorganization or pipeline techniques.
