The low-altitude economy has been incorporated into the national strategic emerging industries. The Low-altitude Intelligent Integrated Electronic System （LIIES） serves as the core technological framework ensuring the safe and efficient operation of low-altitude aircraft. This system is currently transitioning from a fragmented architecture towards an integrated， intelligent， and networked direction. This study provides a systematic overview of the LIIES， covering its fundamental concepts， architecture， and key components. A comparative analysis is also conducted between LIIES and conventional avionics systems deployed on large transport aircraft， highlighting the distinctive requirements and design philosophies of low-altitude platforms. The state-of-the-art development， current application bottlenecks， and future trends are thoroughly examined across several critical technological dimensions， including onboard communication， navigation， and surveillance （CNS）， flight management， multi-modal human-machine interaction， detect-and-avoid （DAA） capabilities， low-altitude intelligent connectivity， and ground-based support infrastructure. To conclude， the paper summarizes the primary technical challenges facing the field and outlines prospective development pathways， with a particular emphasis on standardization， modularization， and enhanced system autonomy. Collectively， these efforts aim to provide both a theoretical foundation and technical reference for the large-scale commercialization of the low-altitude economy.
To meet the demand for high-speed and low-latency data conversion circuits in radar front-ends for low-altitude unmanned aerial vehicles in autonomous flight， obstacle avoidance， and low-altitude inspection applications， this paper presents a 4-bit 20 GSa/s flash analog-to-digital converter implemented in a 12 nm CMOS process. The ADC is designed for high-speed， low-latency data conversion circuits in radar front-ends for low-altitude unmanned aerial vehicles （UAVs） used in autonomous flight， obstacle avoidance， and low-altitude inspection applications. The proposed flash ADC is optimized in two aspects： a high-speed dynamic comparator and time-domain-assisted decision circuitry. The ADC consists of a reference voltage generation circuit， a high-speed dynamic comparator array， a time-comparator-assisted decision circuit， and digital encoding logic. The optimized dynamic comparator improves the small-signal decision capability under high-speed sampling by enhancing the regeneration capability and reducing the parasitic capacitance at critical nodes. In addition， an auxiliary decision scheme using a time-domain comparator replaces the conventional SR latch， further converting the voltage-domain relationship between adjacent comparator outputs into a time-domain decision， thereby reducing the overall power consumption of the circuit. Simulation results show that， at a sampling rate of 20 GSa/s and an input frequency of 2 GHz， the ADC achieves an effective number of bits of 3.8， an SNR of 26.12 dB， an SNDR of 24.69 dB， and an SFDR of 34.35 dB. The ADC consumes 70 mW， corresponding to a Walden FoM of approximately 250 fJ/conversion-step.
To address the challenges in coverage， forwarding and aggregation coordination of heterogeneous UAV clusters under damaged post-disaster infrastructure， a dynamic routing planning model is established with speed， heading angle and transmit power as control variables， which unifies UAV mobility， ground node coverage， link rate， buffer queue， functional backhaul capability and energy consumption within the same time domain. To tackle the deficiencies of the original L-SHADE algorithm， namely the lack of spatial information of task nodes in random initialization and the absence of coverage state feedback in parameter adaptation， a coverage-state-aware L-SHADE is proposed. The coverage-prioritized individuals are adopted to optimize the initial population. According to elite coverage violations， the proportion of feasible individuals and the trend of coverage variation， the algorithm switches among coverage construction， coverage stabilization， performance refinement and coverage recovery states， and constrains the p value， differential scaling factor F and crossover probability CR. Five independent runs are carried out in a fixed heterogeneous environment， and comparisons are made with the original L-SHADE and the L-SHADE only with coverage-prioritized initialization. Descriptive results from the five independent runs show that the average coverage rate of the proposed algorithm rises from 0.827 4 to 0.894 3， an increase of 6.69 percentage points or a relative increment of approximately 8.09%； the average coverage violation is reduced by about 37.64%， the average throughput increases by roughly 64.25%， the average queue load decreases by approximately 19.64%， and the average normalized energy consumption drops by about 6.0%， from 0.000 416 to 0.000 391. The above differences reflect the trend of numerical improvement under the current fixed scenario and small-sample conditions， and a statistically significant superiority cannot be concluded from these results. Within this evidence boundary， the results demonstrate that explicitly introducing coverage state feedback into differential evolution search facilitates a more coordinated search direction among coverage maintenance， data backhaul and resource consumption， and can provide methodological references for continuous communication service planning of heterogeneous unmanned platforms in low-altitude economy and post-disaster emergency scenarios.
To address the problems of complex multi-node relationships， weak early abnormal signals， and difficulty in timely attack warning in low-altitude collaborative tasks， this paper proposes a security evolution prediction method based on execution-communication composite behavior modeling. The method constructs an execution-communication composite task behavior graph from normal task operation data， provides a unified representation of multi-source behaviors such as control execution， task resource access， link interaction， status feedback， and task results， and learns a task propagation baseline. In the online stage， the current suspicious behavior is taken as input to construct an abnormal propagation context， screen candidate affected nodes， and score and rank candidate propagation paths， thereby predicting task objects and propagation paths that may be affected subsequently. Substitute validation based on the CICAPT-IIoT 2024 dataset shows that the proposed method achieves a warning precision of 78.35%， an attack episode coverage of 66.67%， an average of 1.40 false alarms per episode， and an average lead-step ratio of 96.7% for the first valid warning relative to the attack objective completion point. The results indicate that the method can provide early warnings for most attack processes without using future attack information， and can provide support for anomaly isolation， link adjustment， and task replanning in low-altitude collaborative tasks.
Low-altitude aircraft operating under highly dynamic flight conditions and strong interference environments impose stringent requirements on the accuracy and reliability of inertial navigation systems （INSs） and their core sensing units. When a fiber optic gyroscope （FOG） is selected as the core sensing unit of the inertial navigation system， the internal signal processing chain of the gyroscope requires the analog-to-digital converter （ADC） to provide high speed， wide dynamic range， miniaturization， and robust environmental resilience. To replace the imported ADC chip AD9245 commonly employed in fiber optic gyroscopes， this paper presents a 14-bit， 40 MSa/s pipelined analog-to-digital converter to satisfy the aforementioned system-level application requirements. Compared with the AD9245， this proposed design： （1） prioritizes high robustness under complex environments as its primary design objective to satisfy the application requirements of FOGs； （2） decouples the differential input swing and the common-mode level into two independently adjustable parameters， accommodating various front-end drivers and improving ADC versatility in FOG systems； and （3） implements a full-link analog-domain programmable trimming scheme covering the bias currents of all pipeline stages， the sample-and-hold （S/H） and front-end amplifier， clock delay， non-overlapping timing， on-chip LDO， and reference voltage， enhancing adaptability to different optical paths and algorithms..Fabricated and verified in a 130 nm CMOS process， the measured results demonstrate that at a 40 MSa/s sampling rate with a 10 MHz input signal， the ADC achieves a signal-to-noise ratio （SNR） of 65.91 dB， a spurious-free dynamic range （SFDR） of 78.87 dBc， an effective number of bits （ENOB） of 10.66 bits， with a total power consumption of 369 mW. The proposed ADC provides a domestic solution for the closed-loop modulation system of fiber optic gyroscopes， offering highly reliable data conversion for inertial navigation in low-altitude aircraft.
As a safety-critical airborne system， the flight control system requires highly reliable redundancy architectures and safety design strategies. In this paper， the redundancy architectures of civil aircraft fly-by-wire flight control systems are investigated. Based on the concept of ultimate electrical backup for the common mode problem of airworthiness safety， a lightweight advanced flight control system architecture for civil aircraft is proposed， including the design of control logic and an electrical backup control computer. Finally， taking an advanced flight control system architecture of a general aviation unmanned transport aircraft as the research object， a safety analysis is conducted based on the basic pitch control function. The results validate that the flight control system architecture satisfies the safety requirement.
This paper presents a 4~13 GHz programmable divider implemented using a 28 nm CMOS process. The core programmable divider is composed of a 7-stage multi-mode divider （MMD） core （a 2/3 prescaler stage and six cascaded 2/3 units） and an embedded fixed divide-by-two stage. The 7-bit control word is decoded into 2-bit configuration signals （P1， P2） for each unit， which simultaneously determine the chain length and the division operation mode. The 7-stage MMD core achieves continuous integer division ratios from 1 to 255. The fixed divide-by-two stage extends the total division ratio to 2n， ranging from 2 to 510. An orthogonal divide-by-two stage cascaded with the core programmable divider further extends the division ratio to 4n， ranging from 4 to 1020， and generates four-phase I/Q signals. The proposed dual-bit scheme realizes an independent ÷3 mode for the last active unit in the cascaded chain， where the final stage operation state is directly specified by the configuration word. PVT simulations verify the the robustness of the proposed divider. At 13 GHz with a maximum division ratio of 1020， the divider consumes 6.1 mW of power， and the phase noise is -165 dBc/Hz at a 1 kHz offset. The simulation was performed using a 28-nm CMOS process across TT， SS， and FF process corners and temperatures of -55℃， 27℃， and 125℃.
This paper presents a multimodal detection and tracking system designed for nighttime panoramic scanning in security scenarios such as low-altitude takeoff and landing sites， UAV logistics nodes， and industrial park perimeters. The system addresses three key challenges： temporary target invisibility caused by periodic scanning with a monocular rotating camera， degradation of individual visual cues under low illumination， and difficulty in maintaining identity continuity across sector boundaries. The system employs a four-sector temporal coverage strategy and integrates complementary color， texture， and shape representations， adaptive weighted fusion， quality gating， template updating， cross-sector ID inheritance， and visual playback into a unified closed-loop framework. With a 90° stepping angle and a 113° horizontal field of view， adjacent sectors form an overlap of approximately 23°， enabling one 360° coverage cycle within 15 seconds. The fusion module assigns modality weights according to normalized confidence， while the quality-gating mechanism further suppresses contributions from low-confidence modalities and controls frame-by-frame template updating. Experimental results show that the system achieves a CLE of 28.64， an OS of 0.574， a Precision of 0.800， a Success of 0.720， and an end-to-end speed of 10.45 FPS. When the texture modality， PSR/APCE， and quality-gating mechanism are removed， the Success decreases to 0.599， 0.612， and 0.652， respectively. Among 20 valid cross-sector targets， 18 correctly inherit their original trajectory IDs， yielding both an ID retention rate and a recovery success rate of 90%， with two ID switches and two mismatches. These results demonstrate the effectiveness of the proposed system for nighttime wide-field surveillance and ground-based safety perception of low-altitude infrastructure.
Aiming at the on-orbit engineering problem of about 286× rate mismatch between high-speed image acquisition output via 33 MHz SPI and low-speed RS422 downlink of space scientific experimental payloads， this paper designs and implements a mailbox-type credit flow control low-speed image downlink transmission system adapted to aerospace resource constraints and capable of link fault self-recovery for space friction and wear test boxes. The system adopts a collaborative interaction architecture composed of data packets and residual space query credit flow control packets. The FPGA main controller for experimental control constructs a three-stage pipeline processing architecture including SPI interface control， application data mailbox multiplexing and application data downlink organization， and the imaging terminal based on RK3588 realizes the coordinated sending strategy of data stream burst and credit flow control. A standardized mathematical model of credit flow control is established， and the constraint conditions for buffer overflow prevention are fully derived. A dual high-reliability guarantee mechanism consisting of heartbeat continuation packets and timeout-triggered active transmission at the transmitting terminal is developed to solve transmission interruption caused by loss or merging of flow control packets due to on-orbit link noise and thread scheduling delay. The experiment results show that the transmission of a single 256-byte SPI packet takes 92 μs， the steady-state interaction frequency of transmission and flow control is about 25 times per second， and it takes approximately 10 minutes to fully transmit a 3 MB single-frame image， with no buffer overflow or transmission deadlock in the whole process. This scheme has been applied on orbit to the space friction and wear test box， which can effectively adapt to the huge rate gap between high-speed writing and low-speed reading of space payloads， and provide complete engineering reference for embedded data transmission systems with mismatched transmission rates in aerospace， industrial control and other fields.
To address bottlenecks of high maintenance cost and poor scalability of the traditional centralized configuration mode for RapidIO networks in aerospace TT&C （Tracking， Telemetry and Command） systems， this paper proposes a distributed configuration architecture with decoupled routing management and link parameter configuration. In the proposed scheme， the central PPC processor is exclusively responsible for network-wide routing planning. FPGA receiving nodes， as the main control units， autonomously complete local and remote link parameter configuration and the delivery of messages. Measured data from an aerospace TT&C prototype shows that the design significantly reduces the system coupling and shortens the configuration time to the millisecond level. It greatly improves the system̓s fault tolerance and dynamic expansion capability， and possesses high application value for large-scale heterogeneous aerospace TT&C systems.
