×
模态框(Modal)标题
在这里添加一些文本
Close
Close
Submit
Cancel
Confirm
×
模态框(Modal)标题
×
Home
About Journal
About Journal
Indexed in
Awards
Editorial Board
Guide for Authors
Browse
Current Issue
Just Accepted
Archive
Highlights
Topic
Most Viewed
Most Download
Most Cited
E-mail Alert
RSS
Subscribe
Download
Editorial Policy
Contact Us
Figure/Table detail
Research for agile development technique based on memory compiler
LIU Sunchenxing, CAI Hao
Integrated Circuits and Embedded Systems
, 2024, 24(
1
): 19-24.
结构层次
功能
参考
文献[
11
]
参考
文献[
12
]
RRAM阵列
RRAM阵列生成
√
√
外围模拟电路
参考单元生成
×
√
多路选择器生成
×
√
写放大器生成
×
√
模拟P&R
×
√
模拟集成
×
√
外围数字电路
综合
×
√
物理实现
×
√
设计约束生成
×
√
GDS和Verilog引入
×
√
系统级
混合信号P&R
×
√
混合信号集成
×
√
版图生成
×
√
版图验证
√
√
系统级特征化
×
√
Table 2
Function of RRAM compiler
Other figure/table from this article
Fig. 1
Customized MRAM design flow
Fig. 2
MRAM macro design diagram
Fig. 3
General work flow of memory compiler
Table 1
Basic parameters for user define
Fig. 4
Overall compile and characterize methodology of OpenRAM
Fig. 5
AutoDCIM compilation framework
Fig. 6
Workflow of RRAM compiler
Fig. 7
RRAM CIM compiler workflow
Fig. 8
MRAM macro design considering compiler needs