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Figure/Table detail
Design and analysis of CAN bus error detection system
MA Yuequan, GE Huamin, ZHU Fangye
Integrated Circuits and Embedded Systems
, 2024, 24(
8
): 23-28. DOI:
10.20193/j.ices2097-4191.2024.0011
Fig. 2
State machine diagram
Other figure/table from this article
Fig. 1
Structure of the overall system
Fig. 3
Fixed format message
Table 1
CAN bus error type and code
Fig. 4
Host system interface
Fig. 5
System test framework
Fig. 6
Stuff error test result
Fig. 7
CRC error test result
Fig. 8
Format error test result
Fig. 9
ACK error test result
Fig. 10
Bit error test result