Design of system memory protection unit based on bus matrix

YANG Xiaogang, ZHU Zhangmin, WEI Jinhe, HU Kai

Integrated Circuits and Embedded Systems ›› 2025, Vol. 25 ›› Issue (5) : 16-23.

PDF(10289 KB)
PDF(10289 KB)
Integrated Circuits and Embedded Systems ›› 2025, Vol. 25 ›› Issue (5) : 16-23. DOI: 10.20193/j.ices2097-4191.2025.0005
Research Paper

Design of system memory protection unit based on bus matrix

    {{javascript:window.custom_author_en_index=0;}}
  • {{article.zuoZhe_EN}}
Author information +
History +

HeighLight

{{article.keyPoints_en}}

Abstract

{{article.zhaiyao_en}}

Key words

QR code of this article

Cite this article

EndNote

Ris (Procite)

Bibtex

Download Citations
{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2025, 25(5): 16-23 https://doi.org/10.20193/j.ices2097-4191.2025.0005

References

Publishing order | Descend order by publishing year | Descend order by cited within

References

{{article.reference}}

Funding

RIGHTS & PERMISSIONS

{{article.copyrightStatement_en}}
{{article.copyrightLicense_en}}
PDF(10289 KB)

Accesses

Citation

Detail
Sections
Recommended

/

〈 〉