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Acceleration scheme for LMS algorithms based on RISC-V
YE Anlong, MA Lingkun, QU Zongyi
Integrated Circuits and Embedded Systems ›› 2025, Vol. 25 ›› Issue (5) : 52-59.
PDF(5755 KB)
PDF(5755 KB)
Acceleration scheme for LMS algorithms based on RISC-V
The Least Mean Square algorithm, as a typical adaptive filtering algorithm, has found extensive application in the field of noise suppression. Its implementation is mainly based on general-purpose processors, yet this method suffers from low computational efficiency and performance. The RISC-V architecture, with the advantages of open-source, streamlining, and scalability, is suitable for the implementation of dedicated processors. In this paper, a RISC-V based specialized processor is designed for the LMS algorithm. The customized instruction set F extension is used to process floating point numbers, and MAC instructions are added to the coprocessor to complete the acceleration of the LMS algorithm. The experiment results show that the processor can realize effective noise cancellation, when the input signal-to-noise ratio is 5 dB, the signal-to-noise ratio after noise cancellation is 17.5 dB. When the system uses FPU to execute the LMS algorithm, the number of instruction execution is 220 354, and the execution cycle is 586 221. When this design scheme is used, operating in FPU+MAC mode, the number of instruction execution is 31 621, and the execution cycle is 89 412, demonstrating a remarkable improvement in efficiency.
RISC-V / coprocessor / LMS / FPU / Hummingbird E203
| [1] |
|
| [2] |
|
| [3] |
Road traffic gives rise to noise and air pollution exposures, both of which are associated with adverse health effects especially for cardiovascular disease, but mechanisms may differ. Understanding the variability in correlations between these pollutants is essential to understand better their separate and joint effects on human health. We explored associations between modelled noise and air pollutants using different spatial units and area characteristics in London in 2003-2010. We modelled annual average exposures to road traffic noise (LAeq,24h, Lden, LAeq,16h, Lnight) for ~190,000 postcode centroids in London using the UK Calculation of Road Traffic Noise (CRTN) method. We used a dispersion model (KCLurban) to model nitrogen dioxide, nitrogen oxide, ozone, total and the traffic-only component of particulate matter ≤2.5μm and ≤10μm. We analysed noise and air pollution correlations at the postcode level (~50 people), postcodes stratified by London Boroughs (~240,000 people), neighbourhoods (Lower layer Super Output Areas) (~1600 people), 1km grid squares, air pollution tertiles, 50m, 100m and 200m in distance from major roads and by deprivation tertiles. Across all London postcodes, we observed overall moderate correlations between modelled noise and air pollution that were stable over time (Spearman's rho range: |0.34-0.55|). Correlations, however, varied considerably depending on the spatial unit: largest ranges were seen in neighbourhoods and 1km grid squares (both Spearman's rho range: |0.01-0.87|) and was less for Boroughs (Spearman's rho range: |0.21-0.78|). There was little difference in correlations between exposure tertiles, distance from road or deprivation tertiles. Associations between noise and air pollution at the relevant geographical unit of analysis need to be carefully considered in any epidemiological analysis, in particular in complex urban areas. Low correlations near roads, however, suggest that independent effects of road noise and traffic-related air pollution can be reliably determined within London. Copyright © 2015 The Authors. Published by Elsevier Ltd.. All rights reserved.
|
| [4] |
张晓宇, 仪垂杰.主、 被动噪声控制的实验研究[J]. 噪声与振动控制, 2011, 31(3):145-148.
传统的吸、隔声等被动噪声控制方法,适用于中、高频噪声的控制;主动噪声控制是利用声波的相消性干涉来达到降噪的目的,能够有效降低500 Hz以下的低频噪声。针对各自的不足,提出结合使用二者控制噪声的方法,在传统消声结构的基础上附加采用多通道FXLMS算法的主动消声系统。该装置充分发挥主、被动控制的长处,使用被动方法控制中、高频噪声,采用主动控制抵消低频声。实验结果表明主、被动噪声控制方法扩展降噪频带范围,改善降噪效果,是可行和有效的。
|
| [5] |
|
| [6] |
郑康, 李晨, 陈海燕, 等. 超长指令字DSP 标量访存单元的设计与优化[J]. 计算机工程与科学, 2023, 45(11):1929-1940.DOI:10.3969/j.issn.1007-130X.2023.11.004.
|
| [7] |
|
| [8] |
|
| [9] |
|
| [10] |
|
| [11] |
|
| [12] |
胡振波. 手把手教你设计CPU[M]. 北京: 人民邮电出版社,2018:55-62.
|
| [13] |
|
| [14] |
|
| [15] |
邓天传, 胡振波. 一种超低功耗的 RISC-V 处理器流水线结构[J]. 电子技术应用, 2019, 45(6):50-53.DOI:10.16157/j.issn.0258-7998.182563.
|
| [16] |
|
| [17] |
潘树朋, 刘有耀, 焦继业, 等. 基于RISC-V浮点指令集FPU的研究与设计[J]. 计算机工程与应用, 2021, 57(3):80-86. DOI:10.3778/j.issn.1002-8331.2002-0347.
针对目前浮点运算软件实现速度慢,不能满足嵌入式处理器实时性要求以及运算种类有限等问题,提出了一种基于RISC-V指令集的浮点处理器,能够执行加法、减法、乘法、除法、平方根、乘累加以及比较运算,完全符合IEEE 754-2008标准。在VCS仿真环境下对浮点处理器进行了功能验证,各模块均能满足正确性要求。将浮点处理器与一款开源处理器核蜂鸟E203集成,使用SMIC 0.18工艺库完成了逻辑综合,并在FPGA上对设计进行了测试。结果表明,该浮点处理器的逻辑门数仅为24 200,吞吐量为150 MFLOPS,与已公开文献的设计方案相比,硬件面积分别减少7%、1.5%。综合运行频率可达100 MHz。
|
| [18] |
唐俊龙, 吴圳羲, 卢英龙, 等. 面向RISC-V嵌入式处理器的浮点单元设计与移植[J]. 电子设计工程, 2023, 31(7):119-123,131. DOI:10.14022/j.issn1674-6236.2023.07.025.
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