Figure/Table detail

Hardware implementation and optimization of SM3 algorithm based on BSV
LI Kexin, HAN Yueping, NIE Huaihao
Integrated Circuits and Embedded Systems, 2024, 24(10): 31-35.   DOI: 10.20193/j.ices2097-4191.2024.0028

方 案 最高频率/MHz 资源占用/LUT 吞吐量/(Gb·s-1)
BSV 375.0 1.56×103 3.20
Verilog 204.0 1.19×103 1.37
参考文献[1] 92.5 1.79×103 0.70
参考文献[12] 69.0 1.93×103 0.50
Table 2 Result comparison
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