Semiconductor equipment is a critical component in chip manufacturing, performing essential processes such as lithography, etching, and thin-film deposition. The efficiency of its scheduling directly impacts wafer production capacity and factory profitability. Therefore, designing an efficient and stable scheduling system is crucial for achieving optimal production output. On one hand, the high-precision, multi-step wafer processing procedures increase the complexity of designing equipment scheduling systems. On the other hand, the efficiency of wafer scheduling within the equipment directly affects production capacity, imposing stringent requirements on the system's computational efficiency. Traditional scheduling design methods, often based on genetic algorithms that search for optimal solutions within the solution space, struggle to meet real-time system demands. This study systematically analyzes five scheduling constraints in dual-cluster wafer processing semiconductor equipment: wafer discharge constraints, module usage constraints, prohibition of overloading, valve mutual exclusion constraints, and Just in Time requirements. Innovatively, the task scheduling problem for the processing chamber task pool and the robotic arm task pool is formulated as a Mixed Integer Programming (MIP) model. By leveraging the mathematical programming solver Gurobi for rapid solution, this approach achieves a computational speed improvement of an order of magnitude compared to traditional algorithms.