Research on a SAR ADC Capacitor Mismatch Calibration Technique

Liu Jixiang

Integrated Circuits and Embedded Systems ›› 0

Integrated Circuits and Embedded Systems ›› 0 DOI: 10.20193/j.ices2097-4191.2026.0018

Research on a SAR ADC Capacitor Mismatch Calibration Technique

  • Liu Jixiang
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Abstract

Addressing the capacitor mismatch issue in high-precision successive approximation analog-to-digital converters (ADCs), this paper designs a foreground calibration technique based on sine signal input. By collecting kernel data for multiple fitting to ensure the signal-to-noise ratio (SNR) meets the specifications, the capacitor mismatch register values are obtained and OTP programming is performed. This effectively improves conversion accuracy and SNR without affecting the ADC sampling rate. This foreground calibration technique is derived from the Least Mean Squares (LMS) algorithm. It collects 16K kernel data from the SAR ADC and performs nonlinear least squares fitting using Matlab. Drawing on the idea of the LMS algorithm, the residual signal undergoes multiple iterations, with each iteration adjusting the weight of each bit of the ADC accordingly. After approximately 1000 iterations, the SNR reaches 88 dB and the spurious-free dynamic range (SFDR) is 98 dB, which are 22 dB and 17 dB higher than before calibration, respectively. Simulation and test results show that this calibration technique effectively enhances the output performance of the ADC.

Key words

SAR ADC / LMS algorithm / Simulink simulation / capacitance mismatch / calibration algorithm

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Liu Jixiang. Research on a SAR ADC Capacitor Mismatch Calibration Technique[J]. Integrated Circuits and Embedded Systems. 0 https://doi.org/10.20193/j.ices2097-4191.2026.0018

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