Addressing the power supply issues of noise-sensitive electronic devices such as mobile phone cameras and Bluetooth, a low dropout regulator (LDO) with high power supply rejection ratio (PSRR) and ultra-low dropout voltage has been designed. The circuit employs an N-type field-effect transistor (NMOS) as the regulation transistor and is powered by a dual-power supply. It segregates the bias power supply from the input power supply of the regulation transistor, thereby attaining a high Power Supply Rejection Ratio (PSRR) and an ultra-low dropout voltage. The design incorporates a pre-regulation modulation circuit and a low-pass filter to process the reference voltage, enhancing the PSRR of the bias power supply. The main loop adjust the system's pole-zero distribution through inverse nested Miller compensation, improving the overall PSRR of the circuit. The circuit and layout design were completed based on a 0.18µm CMOS process. The maximum load current of the circuit is 500mA. Simulation results show that the dropout voltage at maximum load current is 100mV. At a load of 10mA, the power supply rejection ratio (PSRR) of the input power supply at frequencies of 100Hz, 1kHz, 10kHz, and 1MHz are -110dB, -90dB, -70dB, and -65dB, respectively.