Research on Reading-Writing Architecture of NVMe SSD Based on Synchronous Multi-Channel

WU zhou Xiong, DAI di Xiao, HE quan Yu

Integrated Circuits and Embedded Systems ›› 0

Integrated Circuits and Embedded Systems ›› 0 DOI: 10.20193/j.ices2097-4191.2026.0052

Research on Reading-Writing Architecture of NVMe SSD Based on Synchronous Multi-Channel

  • WU zhou Xiong, DAI di Xiao, HE quan Yu
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Abstract

In order to improving the storage efficiency of NVMe SSD in airborne embedded storage system under complex task scenarios and ensuring the operational stability and accuracy of the embedded storage system, this paper does some research on reading-writing architecture of NVMe SSD based on synchronous multi-channel technology. By elaborating the design methods of I/O queues, physical region pages and interrupt processing under the synchronous multi-channel architecture, the implementation process and operating characteristics of the synchronous multi-channel NVMe SSD read-write architecture are intuitively presented. Meanwhile, a real test scenario is constructed based on a multi-core processor platform and deployed in an actual airborne embedded storage system. The experimental results verify the correctness of the proposed synchronous multi-channel NVMe SSD read-write architecture.

Key words

NVMe / synchronous multi-channel / IO queue / embedded / storage

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WU zhou Xiong, DAI di Xiao, HE quan Yu. Research on Reading-Writing Architecture of NVMe SSD Based on Synchronous Multi-Channel[J]. Integrated Circuits and Embedded Systems. 0 https://doi.org/10.20193/j.ices2097-4191.2026.0052

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