A wide-dynamic-range reconfigurable logarithmic amplifier based on 0.18 μm CMOS process is designed to address the problems of wide bandwidth of partial discharge signals of electrical equipment and significant amplitude difference in sensor output signals. To balance broadband response and wide dynamic range detection capability, a successive detection logarithmic amplification architecture is adopted, which combines multi-stage limiting amplification with full-wave detection circuits to realize logarithmic compression of input signals. To improve bias stability and reduce the influences of process and temperature variations, a constant-transconductance self-bias circuit is introduced to enhance the consistency of bias current and static operating point of each limiting amplification unit. Aiming at the differentiated requirements of logarithmic slopes in different detection scenarios, a logarithmic response slope reconfiguration method based on an on-chip digital switch array is proposed. With the main circuit structure unchanged, flexible configuration of multiple logarithmic response slopes is realized by selecting outputs of different detection current branches through the digital switch array. Simulation results show that the designed amplifier achieves a −3 dB bandwidth of 40 MHz and an effective input dynamic range of 72 dB under a 2 V supply voltage, with the logarithmic conformity error within ±1.9 dB and eight adjustable slope gears supported. Integrating broadband performance, wide dynamic range and reconfigurable characteristics, the proposed amplifier can meet the application requirements of partial discharge online monitoring systems for multi-sensor adaptation, wide-dynamic-range detection and multi-gear output configuration.