In the paper,a data processing system is proposed that uses true dual-port RAM operation addresses to connect end-to-end to realize a ring buffer,and uses a sliding window to segment the time series data input to the ring buffer.By using burst mode to write real-time data into the ring cache,the timing consumption caused by repeated input of RAM operation addresses when the ring cache is written is reduced,and the rate is increased by 49.9% compared to the single-byte mode.By reserving a 1 MB buffer area on the ring buffer,the system can still work normally when the data rate of writing to the ring buffer is not constant within the range of 12~20 Mb/s,and the system applicability is improved.The verification of deployment on FPGA shows that the system meets the real-time data segmentation calculation requirements of the electronic system.