Design of Hot Standby Redundant Communication System with Two Computers Running at the Same Time

Xue Pei, Zhang Xingang, Yang Fang

Integrated Circuits and Embedded Systems ›› 2022, Vol. 22 ›› Issue (10) : 79-83.

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Integrated Circuits and Embedded Systems ›› 2022, Vol. 22 ›› Issue (10) : 79-83.
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Design of Hot Standby Redundant Communication System with Two Computers Running at the Same Time

  • Xue Pei1, Zhang Xingang1, Yang Fang2
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Abstract

In the paper,a redundant system is proposed based on the simultaneous operation of the master and the backup,which can automatically switch the backup to take over the communication with the slave with a low delay when the master is abnormal or pulled out.After power-on,there is no need to wait for the host computer to set up,the system automatically elects the host computer and the standby computer to speed up the initialization of the system.Through the mutual detection of heartbeat and in-position indication signals between the host and the standby,it is judged whether it is necessary to perform the host-standby switch.The data synchronization is realized through the ring cache,which ensures that the communication data is not lost when the host-standby switch is switched,and improves the communication reliability.The verification shows that in a redundant communication system with a data bandwidth of 12.5 Mb/s,when the master is abnormal or pulled out,after a switching delay of 170 μs,the standby takes over the communication with the slave.

Key words

redundant system / active-standby mode switching / ring buffer / DSP / FPGA

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Xue Pei, Zhang Xingang, Yang Fang. Design of Hot Standby Redundant Communication System with Two Computers Running at the Same Time[J]. Integrated Circuits and Embedded Systems. 2022, 22(10): 79-83

References

[1] 李登静,范守文.基于FPGA的双CPU容错控制器设计[J].计算机工程,2010(2):3.
[2] 张遵伟,曹宝香,聂胜伟.基于双口RAM的冗余架构同步技术研究[J].计算机工程,2012(18):227230.
[3] 林沐,黄建,梁旭.基于DSP+FPGA的无人机双冗余配电管理计算机设计[J].国外电子测量技术,2017,36(9):8.
[4] 闫鹏.基于FPGA的自律双机热备系统的研究与设计[D].北京:北京交通大学,2013.
[5] 王鹏彰.基于双DSP+FPGA的组合导航冗余控制器设计与实现[D].南京:南京理工大学,2017.
[6] 韩明峰.环形缓冲区读写操作的分析与实现[J].单片机与嵌入式系统应用,2003,3(12):7475.
[7] 刘川,黎高峰,韩团军.基于FPGA循环冗余校验码系统设计[J].电子质量,2016(6):4.
[8] 徐军,张磊,孙军峰.一种基于双口RAM的冗余系统通信方法[J].铁道通信信号,2014(12):4.
[9] 杨泽林,李先发.基于双指针环形缓冲区的数据采集系统设计[J].仪表技术与传感器,2016(11):3.
[10] 田腾,石茂林,宋学官,等.基于滑动窗口的时间序列异常检测方法[J].仪表技术与传感器,2021(7):5.
[11] 赵小珍,刘波,朱标,等.基于FPGA多路机载冗余图像处理系统的设计与实现[J].现代电子技术,2013,36(23):4.
[12] 孙广海.浅谈一种基于FPGA的双冗余422串口通信方法及实现[J].科学与信息化,2020(27):2.
[13] 韩月涛,潘伟萍,杨帆,等.基于FPGA的三模冗余UART电路设计[J].电子测量技术,2011,34(3):5.
[14] 李圣昆,郝少帅,杨玉华,等.基于FPGA的两级冗余编码系统[J].探测与控制学报,2021,43(1):5.
[15] 陈仁,王海英,华建文,等.基于FPGA的星载UART通信设计与实现[J].科学技术与工程,2015(13):6.
[16] 刘鎏,臧峰,牛洪海.基于FPGA的高速冗余I/O总线设计与实现[J].自动化仪表,2019,40(4):4.
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