Aiming at the problem of low data transmission rate of domestic wired unit test bed, a Gigabit Ethernet transmission system is designed by using domestic FMQL chip as control chip.Ethernet data transmission is a widely used means of transmission.The domestic FMQL chip integrated with ARM and FPGA is transplanted with LwIP protocol stack, which greatly simplifies the design complexity.The key technology of system design is to realize the data interaction between PS end and PL end.By calling the AXIDMA IP core in FPGA and designing a set of transmission logic in ARM, the data sent by PL end is successfully transmitted to PC host computer.The experiment results show that the system can realize the data interaction between PS and PL, and the Ethernet transmission speed can reach 510 Mbps, which can meet the transmission requirements of the test bench.