In this paper,an implementation of the LZW compression algorithm using FPGA is proposed,the system block diagram and the control logic of the controller to implement the LZW algorithm are introduced,and the modular description design of the core control unit is used in Verilog language.Through simulation verification on Xilinx's Artix7 series FPGA XC7A100T platform,the results show that the scheme is feasible and effective with good transplantation and scalability.
Key words
LZW /
compression algorithm /
FPGA /
FIFO /
RAM
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References
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