Aiming at the need to simulate and verify various functions of the data acquisition and editing equipment on a spacecraft before launching with the missile,a digital communication module with FPGA as the control core and RS-422 and LVDS interfaces as the data transmission link is designed.Three channels of RS-422 are used to simulate the output of digital sensors,and one channel of RS-422 is used to simulate status.UART standard communication protocol is adopted in the four asynchronous RS-422 channels.The data receiver adopts the majority decision principle to ensure the accuracy of data transmission.The asynchronous RS-422 transmission rate is 115.2 kbps.Synchronous RS-422 adopts HDLC protocol,which is used as a backup link for data read-back of the data acquisition and editor.The LVDS transmission link uses the cable driver CLC001 and the equalizer CLC014 to achieve zero error transmission of LVDS data through a 120 m twisted pair cable at a rate of 240 Mbps.