This paper analyzes the design requirement of the localization of the relay protection devices and gives a design scheme of a multi-chip FPGA integrated system.The system selects multiple small-resource domestic FPGA to integrate in a star structure,which has stable performance.The master node FPGA is used to realize the logic function of the single peripheral interface of the system and the data forwarding function of the CPU and the slave node FPGA.The slave node FPGA is used to realize the logic function of the reusable peripheral interface of the system.The user-defined interconnection interface is designed to realize the data interaction between the master and slave FPGA.All FPGAs operate synchronously based on the same system clock and reset.The system is simple to implement andhas been proved stable and reliable,and has begun to run in the localization pilot project.