Research on Compatibility Replacement Design of FPGA Division IP

Pan Weizhuang, Duan Shusheng, Mou Chuankun, Chang Guilin

Integrated Circuits and Embedded Systems ›› 2023, Vol. 23 ›› Issue (1) : 19-21.

PDF(1103 KB)
PDF(1103 KB)
Integrated Circuits and Embedded Systems ›› 2023, Vol. 23 ›› Issue (1) : 19-21.
TOPICAL DISCUSS

Research on Compatibility Replacement Design of FPGA Division IP

  • Pan Weizhuang, Duan Shusheng, Mou Chuankun, Chang Guilin
Author information +
History +

Abstract

Division is the most complex of the four basic arithmetic operations.IP is widely used in FPGA design due to its agility and reuse.The most common form of division implemetaion is using specific IP which is provided by EDA vendors,and hardware trojans can be inserted into IP during system design.A compatible approach is presented by analyzing algorithm and function of the division IP.The simulation results show that compatible division is quite equal to IP in performance and resource utilization.The proposed scheme is also suitable for software domestic replacement and other IP compatible design.

Key words

division IP / FPGA / LUT / WNS / WHS

Cite this article

Download Citations
Pan Weizhuang, Duan Shusheng, Mou Chuankun, Chang Guilin. Research on Compatibility Replacement Design of FPGA Division IP[J]. Integrated Circuits and Embedded Systems. 2023, 23(1): 19-21

References

[1] 田耕,徐文波,胡彬.Xilinx ISE Design Suite 10.x FPGA开发指南-逻辑设计篇[M].北京:人民邮电出版社,2008:1.
[2] Mohammad Tehranipoor,Hassan Salmani,Xuehui Zhang.Integrated Circuit Authentication[M].Switzerland:Springer International Publishing,2014:1.
[3] Mohammad Tehranipoor,Cliff Wang.Introduction to Hardware Security and Trust[M].Switzerland:Springer Science+Business Media,LLC,2012:1.
[4] 安然.基于FPGA的除法器的设计和实现[D].成都:成都理工大学,2011.
[5] 王刘成,林永才,姜文刚.快速高精度除法算法的FPGA实现[J].计算机工程,2011,37(10):239-242.
[6] 王飞.在FPGA中实现高精度快速除法[J].单片机与嵌入式系统应用,2003(2):77-79.
[7] 李文彬,陈金鹰,王惟洁,等.基于FPGA的32位循环型除法器设计[J].物联网技术,2014(11):62-63.
[8] 姚茂群,叶汉能,张立彬.基于FPGA的除法器设计[J].杭州师范大学学报(自然科学版),2010,9(6):478-480.
[9] 王帆,陈涛,张刚.基于珠算原理设计64位除法器及FPGA实现[J].科学技术与工程,2014,14(26):264-268.
[10] Xilinx Inc.Divider Generator v5.1 LogiCORE IP Product Guide,2021.
[11] Behrooz,Parhami.Computer Arithmetic: Algorithms and Hardware Designs[M].New York:Oxford University Press,2000:1.
PDF(1103 KB)

Accesses

Citation

Detail

Sections
Recommended

/