Simulation Analysis of IC Signal Integrity Based on Flip Chip Structure

Li Shaocong, Yang Lu, Lv Junwen, Yan Huixin

Integrated Circuits and Embedded Systems ›› 2023, Vol. 23 ›› Issue (10) : 12-15.

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Integrated Circuits and Embedded Systems ›› 2023, Vol. 23 ›› Issue (10) : 12-15.
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Simulation Analysis of IC Signal Integrity Based on Flip Chip Structure

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Abstract

In the process of designing Flip Chip packaged chips,there are issues such as discontinuities in transmission line impedance and excessive crosstalk.In the paper,a simulation analysis and design method based on impedance and crosstalk is proposed from two aspects of stack setting and plate medium thickness,which mainly involves two aspects:for the impedance mutation problem caused by the signal plane of reference being divided,the signal has a complete return path by adding a plane of reference,so that the impedance of the transmission line at the plane division is reduced from 167.5 Ω to 52.5 Ω.For the problem of high crosstalk coefficient between lines caused by excessive wiring density,the maximum crosstalk coefficient between transmission lines is reduced from 17.26% to 14.01% by reducing the dielectric thickness of the plate.The analysis and simulation results show that the method effectively reduces the potential signal integrity risk in chip design,and improves the reliability and stability of the chip.

Key words

Flip Chip / IC / signal integrity / impedance / crosstalk

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Li Shaocong , Yang Lu , Lv Junwen , et al. Simulation Analysis of IC Signal Integrity Based on Flip Chip Structure[J]. Integrated Circuits and Embedded Systems. 2023, 23(10): 12-15

References

[1]
王楚哲, 苏成悦, 李增, 等. 基于Sigrity在SDIO板级信号完整性仿真分析与优化[J]. 计算机测量与控制, 2022, 30(3):204-210,221.
[2]
罗必露, 杨昭荣. 基于Cadence的接收机信号完整性设计[J]. 微波学报, 2016, 32(S2):498-500.
[3]
厉科立, 景占荣, 严会会. 基于HyperLynx的FPGA系统信号完整性仿真分析[J]. 现代电子技术, 2011, 34(8):144-146,150.
[4]
杨玲玲, 孙玲, 孙海燕. IC封装中键合线传输结构的仿真分析[J]. 电子与封装, 2014, 14(9):1-4,24.
[5]
黄成, 夏军, 刘成汉, 等. 高速IC测试系统的信号完整性设计[J]. 电子测量技术, 2019, 42(3):84-87.
[6]
陈放, 田建宇, 孙兆牛, 等. 基于信号完整性与电源完整性的PCB电磁兼容协同仿真方法研究[J]. 航天控制, 2017, 35(4):90-94.
[7]
蒋纬, 郑宏宇, 赵祖军. IC高密度陶瓷外壳串扰对信号完整性的影响[J]. 半导体技术, 2014, 39(3):220-225,232.
[8]
徐越, 范红, 金浩. 分析影响PCB阻抗主要因素及影响差异对比[J]. 印制电路信息, 2021, 29(S2):1-10.
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