In the paper,a clock and reset management circuit for system-on-chip is designed,and builds a verification platform for verification.The design integrates reset signal generation circuitry,reset synchronous release circuit,voltage reference,voltage controlled oscillator,phase-locked loop,clock gate circuit,etc.The digital circuit design is based on the 180 nm standard unit library,and a fully functional automated test platform is built based on the System Verilog language,with code coverage and functional coverage of 100%.Compared with the traditional design,all units of the circuit are internal,with high integration and high reliability.
Key words
SoC /
clock management /
reset management /
coverage /
power consumption control
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