模态框(Modal)标题

在这里添加一些文本

模态框(Modal)标题

 
  • Home
  • About Journal
  • Editorial Board
  • Guide for Authors
  • Browse
    • Current Issue
    • Just Accepted
    • Archive
    • Highlights
    • Topic
    • Most Viewed
    • Most Download
    • Most Cited
  • Download
  • Editorial Policy
    • Publication Ethics Statement
    • Peer Review Policy
  • Contact Us
  • 中文

Figure/Table detail

Design and analysis of CAN bus error detection system
MA Yuequan, GE Huamin, ZHU Fangye
Integrated Circuits and Embedded Systems, 2024, 24(8): 23-28.   DOI: 10.20193/j.ices2097-4191.2024.0011

Fig. 3 Fixed format message
Other figure/table from this article
  • Fig. 1 Structure of the overall system
  • Fig. 2 State machine diagram
  • Table 1 CAN bus error type and code
  • Fig. 4 Host system interface
  • Fig. 5 System test framework
  • Fig. 6 Stuff error test result
  • Fig. 7 CRC error test result
  • Fig. 8 Format error test result
  • Fig. 9 ACK error test result
  • Fig. 10 Bit error test result

京ICP备14021798号-2
Copyright © Integrated Circuits and Embedded Systems
Address: Room 8F, Weishi Building, No.39, XueYuan Road, Haidian District, Beijing, P.R.China   P.C. : 100191
Tel: 010-82317978 
E-mail: jices@buaa.edu.cn
Total visitors:   Visitors of today:   Now online:
Supported by: Beijing Magtech Co. Ltd