Integrated Circuits and Embedded Systems

Real-time efficient dense optical flow accelerator based on FPGA

FENG Yutai, XU Wenyang, CHEN Fan, WANG Jiaxing, TANG Yongming, SUN Hao

Integrated Circuits and Embedded Systems, 2025, 25(6): 78-86. DOI: 10.20193/j.ices2097-4191.2025.0021

Fig. 8 Overlay effect of visualization of dense optical flow field for four dataset

Other figure/table from this article

Fig. 1 Multi-scale pyramidal optical flow calculations
Fig. 2 Flow chart of the pyramid LK optical flow algorithm
Fig. 3 Real-time streaming hardware acceleration system with heterogeneous collaborative architecture
Fig. 4 LK pyramid data flow
Fig. 5 Schematic diagram of iterative folding pipeline architecture
Fig. 6 Image temporal gradient convolution kernel hardware
Fig. 7 Pyramid deflation module
Table 1 Error comparison between the proposed hardware architecture and OpenCV-based optical flow algorithm
Table 2 Hardware resource consumption and performance comparison between the proposed hardware architecture and other advanced FPGA-based implementations of optical flow algorithm
Table 3 Comparing hardware resource consumption for different pyramid tiers
Table 4 Performance of different resolutions under the three pyramids