Figure/Table detail

Design of system memory protection unit based on bus matrix
YANG Xiaogang, ZHU Zhangmin, WEI Jinhe, HU Kai
Integrated Circuits and Embedded Systems, 2025, 25(5): 16-23.   DOI: 10.20193/j.ices2097-4191.2025.0005

SDIn 地址范围 权 限
0 0x0000 0000 ~ 0xFFFF FFFF ---|---
1 0x0000 0000 ~ 0x1FFE CFFF rwx|---
2 0x1FFE D000 ~ 0x1FFE D1FF r--|---
3 0x1FFE D000 ~ 0x1FFE D1FF -w-|---
4 0x1FFE D200 ~ 0x1FFF FFFF rwx|---
5 0x1FFE D000 ~ 0x1FFE D1FF rwx|r--
6 0x1FFE D000 ~ 0x1FFE D1FF rwx|-w-
Table 4 the differentpermission of the different region of Backup SRAM
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