To address the potential performance degradation caused by signal saturation in the signal chain of RF transceivers during practical operation, this work presents an on-chip saturation detection circuit that can be integrated into RF transceivers. The proposed saturation detection circuit mainly consists of an energy detection circuit based on an operational amplifier, a reference voltage generation circuit, and a static hysteresis comparator. Targeted optimizations are implemented to achieve low power consumption and a compact circuit area. Specifically, the energy detection circuit employs an operational amplifier with a low gain-bandwidth product (GBW) to realize the filtering function, thereby eliminating the need for an additional low-pass filter and significantly reducing the area overhead. In the reference voltage generation circuit, a dual-range temperature-code multiplexing scheme is adopted to reduce the hardware overhead of the decoder, thereby further reducing both the circuit area and power consumption. The proposed circuit is designed and fabricated in a 40-nm CMOS process. The carrier frequency is 800 kHz, and the detection speed reaches 80 kHz. The fabricated circuit occupies an area of only 30 μm × 160 μm, with a power consumption of 42.9 μW.