Aiming at the problems of poor interference immunity,loss of locking,mis-coding and loss of numbers in the transmission of long distance high speed LVDS signals,both hardware and software have been optimised.The hardware design uses drivers to implement pre-emphasis technology,increase the voltage output swing and add magnetic isolators to enhance the anti-interference capability,while the receiver uses an equaliser to compensate for signal loss in transmission.The new 6B/10B coding method with self-correction is designed to add supervisory code elements to the valid data,not only to balance the spectrum to reduce crosstalk,but also to guarantee the correctness of the data and meet the reliable demand of high-speed transmission.After several tests,it is finally shown that the design can achieve reliable transmission without error codes at 400 Mb/s under 100 m twisted pair shielded cable.
Key words
LVDS /
FPGA /
6B/10B code
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