In order to solve the initialization configuration function of each IP in the NoC protocol chip and the internal status detection of the NoC chip,a protocol conversion bridge is designed to transfer the ICB bus to the AMBA bus,and a configuration management unit is built based on the core E203 to interconnect different IPs of the NoC chip,so as to realize the initialization configuration and management of the NoC chip.The system is verified from three aspects:module level,system level and FPGA prototype.The test results show that the correctness of the configuration management unit system improves the application scope of the chip.
Key words
E203 kernel /
DBI bus /
PCIe controller /
DDR controller /
cross clock domain design
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References
[1] 孙荪.提高多核处理器片上Cache利用率的关键技术研究[D].合肥:中国科学技术大学,2015.
[2] 贺江.基于片上网络的多核处理器的研究与实现[D].成都:电子科技大学,2013.
[3] 张帅,宋风龙,王栋,等.多核结构片上网络性能-能耗分析及优化方法[J].计算机学报,2013,36(5):988-1003.
[4] 张浩,魏敬和.高效率PLB2AXI总线桥的设计与验证[J].计算机工程,2020,46(8):228-234.
[5] 胡振波.手把手教你设计CPU--RISC-V处理器[M].北京:人民邮电出版社,2018:247-252.
[6] 蒲恺,唐庆,田园.基于IP核的PCIE总线接口逻辑的设计和实现[J].航空计算技术,2017,47(1):116-120.
[7] 马鸣锦,朱剑冰,何红旗.PCI、PCI-X和PCI Express的原理及体系结构[M].北京:清华大学出版社,2007.
[8] 乔亚飞,李华旺,常亮,等.基于FPGA的星载NAND FLASH控制器的设计[J].电子设计工程,2018,26(14):158-161,166.
[9] 剧诺璇.一种基于DDR4控制器的访存调度优化策略[D].西安:西安电子科技大学,2017.
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