Special Topic of Integrated Circuits Reliability
HUANG Xiaofeng, LI Chenming, WANG Haibin, SUN Yongshu, WANG Liang, GUO Gang, WANG Xueming
Integrated Circuits and Embedded Systems.
2024, 24(7):
30-36.
In order to investigate single-event transient (SET) of 22 nm FDSOI technology, we have built a FDSOI NMOS model based on Sentaurus TCAD and carried out various SET simulations in 22nm FDSOI NMOS. The sensitive region, bias voltage and temperature dependence of SET in 22 nm FDSOI NMOS have been examined. The simulation results show that the sensitive regions in 22 nm FDSOI NMOS are the body region and LDD region near the body region. As the bias voltage increases, the total collected charge is increasing, and the width of drain transient pulse current is declining. Compared to the bias voltage, the effect of operating temperature on SET in 22 nm FDSOI NMOS is not significant.