In the paper,the general method of data communication and exchange between MCUs is proposed in embedded system application under the condition that there are multiple MCUs in a single module,and puts forward a method of dividing the sending cache and the receiving cache at both ends of MCU under the premise of short distance between MCUs.DMA and SPI cooperate with each other to carry out high-speed data transmission methods without software intervention,in order to meet the need for frequent access to each other's data applications.

In order to meet the demand of integrated development environment for self-developed chips,a set of integrated development environment scheme composed of Eclipse,GDB and OpenOCD is designed.Further,RAC102 chip of RISC-V architecture is selected as the debugging target.On the basis of driver adaptation and operating system simulation,GDB and OpenOCD are customized compiled,debugging and ported,and a cross-debugging system based on RISC-V architecture is realized.Finally,the GDB debugging command and the corresponding remote serial protocol are analyzed in the cross-debugging system implemented by this scheme,and the corresponding remote serial protocol packet set of each debugging command is explained in detail while verifying the functional correctness of the cross-debugging system.

Embedded devices typically build data storage solutions based on Flash memory and TFFS file systems.This article proposes a data storage optimization scheme based on power outage interrupt to address their storage performance and reliability issues.This scheme caches frequently changing data in memory and only writes cached data to files when the device is powered down,minimizing the number of Flash writes and avoiding the possibility of inconsistent file system metadata caused by device power failure,thereby improving device storage reliability and extending the lifespan of the Flash chip.

In the flight test,in order to solve the problems of SRIO protocol disconnection and poor transmission reliability in the storage process of high-speed and large capacity data,this paper puts forward the optimization design of the data storage system combining SRIO and RS422 with FPGA as the control core.The connection status flag of SRIO link is monitored in real-time and the link reconnection mechanism is added to realize the link recovery,which greatly increases the reliability of data storage.When the RS422 interface circuit is used to receive the telemetry control signal and status feedback,the serial port adds multiple sampling decision design to eliminate the external strong interference,which greatly improves the accuracy of the system to receive the telemetry command.After many tests,the optimized design can realize error-free status data feedback and accurate receiving of telemetry instructions,and improve the transmission reliability of SRIO link,so as to realize the reliable storage of high-speed and large-capacity optical fiber data.